User type access HVAC control system

• US RE47,235 E1
• Filed: 03/03/2014
• Issued: 02/12/2019
• Est. Priority Date: 08/22/2001
• Status: Active Grant

• Current Assignee: MMI Controls Ltd.
• Original Assignee: MMI Controls Ltd.
• Inventors: Poth, Robert J
• Primary Examiner(s): Heneghan, Matthew E
• Application Number:
  US14/195,844
• Time in Patent Office: 1,807 Days
• Field of Search: 726 16, 726 17, 726 26, 726 28
• CPC Class Codes: F24F 11/30 for purposes related to the operation of the system, e.g. for safety or monitoring
• CPC Class Codes: F24F 11/47 Responding to energy costs
• CPC Class Codes: F24F 2110/10 Temperature
• CPC Class Codes: G05B 15/02 electric
• CPC Class Codes: G05B 19/0428 Safety, monitoring G05B19/0423 takes precedence
• CPC Class Codes: G05B 2219/24168 Identify connected programmer to allow control, program entry
• CPC Class Codes: G05B 2219/2614 HVAC, heating, ventillation, climate control
• CPC Class Codes: G05B 2219/2642 Domotique, domestic, home control, automation, smart house
• CPC Class Codes: G06F 21/31 User authentication
• CPC Class Codes: G06F 2221/2107 File encryption
• CPC Class Codes: G06F 2221/2131 Lost password, e.g. recovery of lost or forgotten passwords

Abstract

Systems and methods are described for synchronizing an HVAC control system. A method, includes: a synchronization sequence including: reading a base time from an internal clock at a first time and saving the base time; measuring an elapsed time interval, from the first time to a second time, by counting an external clock using a frequency counter; and then resetting the internal clock to the base time plus the elapsed time regulating user access to an interactive user interface of a programmable thermostat, each user identified by a personal identification number associated with a user type, wherein each personal identification number is recognized by the programmable thermostat as belonging to an access level and users identified as building owners or maintenance personnel are granted further system access.

Claims

1. A method, comprising a synchronization sequence including:

reading a base time from an internal clock at a first time and saving the base time;

measuring an elapsed time interval, from the first time to a second time, by counting an external clock using a frequency counter; and

then

resetting the internal clock to the base time plus the elapsed time.

2. The method of claim 1, further comprising, before measuring the elapsed time interval, clearing the frequency counter.

3. The method of claim 1, further comprising, before measuring the elapsed time interval, setting a flag to enable commencement of the synchronization sequence.

4. The method of claim 3, wherein the flag is set to enable commencement of the synchronization sequence when the external clock transitions from an unavailable state to an available state.

5. The method of claim 3, wherein the flag is set to enable commencement of the synchronization sequence when a user exits a clock menu.

6. The method of claim 1, wherein measuring the elapsed time interval includes setting a flag to indicate that the synchronization sequence has commenced.

7. The method of claim 6, wherein resetting occurs when the flag indicates that the synchronization sequence has commenced and the frequency counter indicates that the elapsed time interval has passed.

8. The method of claim 1, wherein measuring the elapsed time interval commences at a predetermined time increment.

9. The method of claim 1, further comprising, after resetting the internal clock, repeating the synchronization sequence.

10. The method of claim 1, wherein the internal clock is derived from a direct current powered oscillator located in an integrated-circuit real-time clock.

11. The method of claim 1, wherein the external clock is derived from an alternating current power source.

12. The method of claim 11, wherein counting includes counting zero-voltage transitions of an alternating power line waveform.

13. An apparatus, comprising:

an internal clock;

an external clock; and

a microcontroller coupled to the internal clock and the external clock, the microcontroller including a frequency counter,

wherein the microcontroller reads a base time from the internal clock at a first time and saves the base time,

wherein the microcontroller measures an elapsed time interval, from the first time to a second time, using the frequency counter, and

wherein the microcontroller resets the internal clock to the base time plus the elapsed time.

14. The apparatus of claim 13, wherein the microcontroller clears the frequency counter before measuring the elapsed time interval.

15. The apparatus of claim 13, wherein the microcontroller sets a flag to enable commencement of the synchronization sequence.

16. The apparatus of claim 15, wherein the microcontroller sets the flag to enable commencement of the synchronization sequence when the external clock transitions from an unavailable state to an available state.

17. The apparatus of claim 15, wherein the microcontroller sets the flag to enable commencement of the synchronization sequence when a user exits a clock menu.

18. The apparatus of claim 13, wherein the microcontroller sets a flag to indicate that the synchronization sequence has commenced at the beginning of measuring the elapsed time interval.

19. The apparatus of claim 18, wherein the microcontroller resets the internal clock when the flag indicates that the synchronization sequence has commenced and the frequency counter indicates that the elapsed time interval has passed.

20. The apparatus of claim 13, wherein the microcontroller commences measuring the elapsed time interval at a predetermined time increment.

21. The apparatus of claim 13, wherein the microcontroller repeating a synchronization sequence after resetting the internal clock.

22. The apparatus of claim 13, wherein the internal clock includes an integrated-circuit real-time clock having a direct current powered oscillator.

23. The apparatus of claim 13, wherein the external clock includes an alternating current power line.

24. The apparatus of claim 13, wherein the frequency counter includes a zero-voltage transition counter.

25. A programmable thermostat comprising the apparatus of claim 13.

26. A method, comprising:

providing a heating ventilation and air conditioning control system including a programmable digital thermostat with an on board memory;

issuing personal identification numbers to each of a plurality of system users;

associating each of the plurality of system users with at least one of a plurality of user types;

storing the personal identification numbers in a first data structure in the on board memory; and

linking each one of a plurality of entries in the first data structure by reference to at least one of a plurality of entries in a second data structure in the on board memory, the second data structure including a list of user types; and

restricting access to HVAC system controls including regulating user access to an interactive user interface display of the programmable digital thermostat,

wherein all the personal identification numbers associated with each user type are presented with access to all HVAC control system access level privileges associated with each user type and

each user is presented with all privileges associated with all of their user types, characterized by their personal identification number.

27. The method of claim 26, wherein each of the plurality of user types is associated with at least one of a plurality of function sets.

28. The method of claim 26, wherein the on board memory includes a member selected from the group consisting of electrically erasable programmable read only memory, flash memory, random access memory, and network storage devices.

29. The method of claim 26, further comprising:

dynamically updating the first data structure; and

dynamically updating the second data structure.