Performance and power optimization via block oriented performance measurement and control
First Claim
1. A method of controlling power consumption in an integrated circuit that includes a plurality of functional blocks, comprising:
- generating respective block utilization information for the functional blocks included in the integrated circuit; and
independently managing power of the respective functional blocks to match respective block utilization levels according to the respective block utilization information.
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Abstract
An integrated circuit includes a plurality of functional blocks. Utilization information for the various functional blocks is generated. Based on that information, the power consumption and thus the performance levels of the functional blocks can be tuned. Thus, when a functional block is heavily loaded by an application, the performance level and thus power consumption of that particular functional block is increased. At the same time, other functional blocks that are not being heavily utilized and thus have lower performance requirements can be kept at a relatively low power consumption level. Thus, power consumption can be reduced overall without unduly impacting performance.
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Citations
47 Claims
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1. A method of controlling power consumption in an integrated circuit that includes a plurality of functional blocks, comprising:
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generating respective block utilization information for the functional blocks included in the integrated circuit; and independently managing power of the respective functional blocks to match respective block utilization levels according to the respective block utilization information. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 27, 28, 29)
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16. An integrated circuit comprising:
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a plurality of functional blocks; utilization circuits respectively associated with the functional blocks coupled to provide block utilization information of the functional blocks; and
whereinthe integrated circuit is responsive to the block utilization information to independently adjust power consumption levels of the functional blocks to match respective block utilization levels. - View Dependent Claims (17, 18, 19, 20, 21, 22)
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23. A computer system comprising:
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an integrated circuit that includes a plurality of functional blocks; utilization circuits respectively associated with the functional blocks and coupled to provide block utilization information of the functional blocks; and a computer program including an instruction sequence executable by the integrated circuit to adjust power consumption levels of the functional blocks to match respective block utilization levels according to the block utilization information. - View Dependent Claims (24, 25)
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26. An electronic system comprising:
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an integrated circuit including a plurality of functional blocks; means for determining respective block utilization information of the functional blocks; and means for adjusting power consumption of the respective functional blocks to match respective block utilization levels according to the respective block utilization information.
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30. A computer system comprising:
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an integrated circuit that includes a plurality of functional blocks; utilization circuits respectively coupled to the functional blocks to provide block utilization information of the functional blocks; and a computer program including an instruction sequence executable by the integrated circuit to adjust power consumption levels of the functional blocks to match respective block utilization levels according to the block utilization information, wherein, in response to the block utilization level of a respective functional block being greater than a first threshold, the computer program causes a power supply voltage received by the respective functional block to increase and a clock frequency of a clock received by the respective functional block to increase, wherein, in response to the block utilization level of the respective functional block being less than a second threshold, the computer program causes the clock frequency of the clock received by the respective functional block to decrease and the power supply voltage received by the respective functional block to decrease, and wherein the second threshold is less than the first threshold. - View Dependent Claims (31, 32, 33, 34)
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35. A computer system comprising:
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a memory; an integrated circuit that includes a plurality of functional blocks; utilization circuits respectively coupled to the functional blocks to provide block utilization information of the functional blocks, wherein the block utilization information represents activity in each of the functional blocks as measured over a period of time, and wherein each of the utilization circuits comprises; a utilization detection circuit to detect a utilization event; a utilization counter to count a number of utilization events; and a cycle counter to count to a value equal to the period of time; and a computer program including an instruction sequence executable by the integrated circuit to adjust power consumption levels of the functional blocks to match respective block utilization levels according to the block utilization information, wherein one or more of the block utilization levels are based at least in part on the number of utilization events counted by the utilization counter over the period of time, wherein, in response to an increase in a block utilization level for a respective functional block, a clock frequency of the respective functional block is increased to a first frequency value, and wherein, in response to a decrease in the block utilization level for the respective functional block, the clock frequency of the respective functional block is decreased to a second frequency value, the first and second frequency values being different from one another and each greater than zero hertz. - View Dependent Claims (36, 37, 38, 39, 40, 41)
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42. An integrated circuit comprising:
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a plurality of functional blocks; utilization circuits respectively coupled to the functional blocks to provide block utilization information of the functional blocks, wherein the block utilization information represents activity in each of the functional blocks as measured over a period of time, and wherein each of the utilization circuits comprises; a utilization detection circuit to detect a utilization event; a utilization counter to count a number of utilization events; and a cycle counter to count to a value equal to the period of time; wherein the integrated circuit, responsive to the block utilization information, independently adjusts power consumption levels of the of the functional blocks to match respective block utilization levels according to the block utilization information, wherein one or more of the block utilization levels are based at least in part on the number of utilization events counted by the utilization counter over the period of time, wherein, in response to an increase in a block utilization level for a respective functional block, a clock frequency of the respective functional block is increased to a first frequency value, and wherein, in response to a decrease in the block utilization level for the respective functional block, the clock frequency of the respective functional block is decreased to a second frequency value, the first and second frequency values being different from one another and each greater than zero hertz. - View Dependent Claims (43, 44, 45, 46, 47)
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Specification