Low temperature poly-silicon thin film transistor and method of manufacturing the same

• US 10,062,771 B2
• Filed: 05/05/2016
• Issued: 08/28/2018
• Est. Priority Date: 02/19/2016
• Status: Active Grant

• Current Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Original Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd. (TCL Technology Group Corp.)
• Inventors: Li, Jinming
• Primary Examiner(s): HARRISTON, WILLIAM A
• Application Number:
  US15/303,452
• Publication Number:
  US 20180040717A1
• Time in Patent Office: 845 Days
• CPC Class Codes: H01L 21/02068 during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02491 Conductive materials
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02592 amorphous
• CPC Class Codes: H01L 21/02672 using crystallisation enhancing elements
• CPC Class Codes: H01L 27/1277 using a crystallisation promoting species, e.g. local introduction of Ni catalyst
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

The present disclosure relates to a low temperature poly-silicon thin film transistor and a method of preparing the same. The low temperature poly-silicon thin film transistor includes a substrate, a metal induction layer formed on the substrate, a barrier layer formed on the metal induction layer, and an amorphous silicon film layer formed on the barrier layer, the amorphous silicon film layer being converted into a poly-silicon film layer under the inducing effect of the metal induction layer, and the poly-silicon film layer being an active layer. In the present disclosure, although the active layer is obtained by using the metal induction method, the metal induction layer is provided below the amorphous silicon film layer, and a barrier layer is provided between the metal induction layer and the amorphous silicon film layer.

Claims

1. A low temperature poly-silicon thin film transistor comprising a substrate and a metal induction layer formed on the substrate, wherein the low temperature poly-silicon thin film transistor further comprises:

a barrier layer formed on the metal induction layer;

an amorphous silicon film layer formed on the barrier layer;

wherein the amorphous silicon film layer being converted into a poly-silicon film layer under the inducing effect of the metal induction layer, and the poly-silicon film layer being an active layer; and

wherein the metal induction layer is patterned to obtain a patterned metal induction layer.

2. The low temperature poly-silicon thin film transistor according to claim 1, wherein a material chosen for the metal induction layer is one of nickel and nickel silicon alloy.

3. The low temperature poly-silicon thin film transistor according to claim 2, wherein a material chosen for the metal induction layer is nickel silicon alloy, and in a top of the metal induction layer, a mass percentage of the nickel in the nickel silicon alloy is 1%-15%.

4. The low temperature poly-silicon thin film transistor according to claim 1, wherein a thickness of the metal induction layer is 200 Å

-1200 Å

.

5. The low temperature poly-silicon thin film transistor according to claim 1, wherein a material chosen for the barrier layer is SiO_x.

6. The low temperature poly-silicon thin film transistor according to claim 1, wherein a material chosen for the barrier layer is SiO_x.

7. The low temperature poly-silicon thin film transistor according to claim 2, wherein a material chosen for the barrier layer is SiO_x.

8. The low temperature poly-silicon thin film transistor according to claim 3, wherein a material chosen for the barrier layer is SiO_x.

9. The low temperature poly-silicon thin film transistor according to claim 4, wherein a material chosen for the barrier layer is SiO_x.

10. The low temperature poly-silicon thin film transistor according to claim 1, wherein a thickness of the barrier layer is 20 Å

-200 Å

.

11. The low temperature poly-silicon thin film transistor according to claim 1, wherein a thickness of the barrier layer is 20 Å

-200 Å

.

12. The low temperature poly-silicon thin film transistor according to claim 2, wherein a thickness of the barrier layer is 20 Å

-200 Å

.

13. The low temperature poly-silicon thin film transistor according to claim 3, wherein a thickness of the barrier layer is 20 Å

-200 Å

.

14. The low temperature poly-silicon thin film transistor according to claim 4, wherein a thickness of the barrier layer is 20 Å

-200 Å

.

15. A method of preparing a low temperature poly-silicon thin film transistor, wherein the method comprises:

providing a substrate;

forming a metal induction layer on the substrate;

forming a barrier layer on the metal induction layer;

forming an amorphous silicon film layer on the barrier layer, and converting the amorphous silicon film layer into a poly-silicon film layer under the inducing effect of the metal induction layer, and the poly-silicon film layer being an active layer; and

wherein after forming the active layer, an upper surface film layer of the active layer is removed; and

performing photoetching and etching on the active layer to obtain the patterned active layer.

16. The preparation method according to claim 15, wherein converting the amorphous silicon film layer into the poly-silicon film layer under the inducing effect of the metal induction layer refers to diffusing the metal ions of the metal induction layer into the amorphous silicon film layer by using a rapid thermal annealing process, and converting the amorphous silicon film layer into the poly-silicon film layer through the induction of the metal ions.