Always-on audio control for mobile device
First Claim
1. An integrated circuit comprising:
- one or more processors;
at least one memory controller; and
a first circuit coupled to the one or more processors and to the memory controller, wherein the first circuit is configured to remain powered up during times that the one or more processors and the memory controller are powered down, and wherein the first circuit is configured to receive audio samples captured by one or more audio input devices and to detect a predetermined pattern in the audio samples during a time that the one or more processors and the memory controller are powered down, and wherein the first circuit is configured to cause the memory controller and the one or more processors to power up responsive to detecting the predetermined pattern, and wherein the first circuit is configured to write the audio samples that match the predetermined pattern and subsequently-received samples to memory through the memory controller subsequent to powering up the memory controller in response to detecting the predetermined pattern, including writing audio samples to the memory through the memory controller during a time;
(1) after the memory controller and the one or more processors are powered up but the one or more processors are still booting an operating system;
(2) the memory controller is available to accept write operations; and
(3) prior to the one or more processors being ready to operate on the audio samples,whereby the audio samples that match the predetermined pattern are available in the memory for the one or more processors to verify the match subsequent to powering up responsive to the first circuit detecting the match; and
wherein the first circuit comprises a buffer configured to store a plurality of the audio samples, wherein a number of the plurality of audio samples is sufficient to store the audio samples that match the predetermined pattern and the subsequently-received samples until the memory controller is available to receive writes of the audio samples to the memory.
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Accused Products
Abstract
In an embodiment, an integrated circuit may include one or more CPUs, a memory controller, and a circuit configured to remain powered on when the rest of the SOC is powered down. The circuit may be configured to receive audio samples from a microphone, and match those audio samples against a predetermined pattern to detect a possible command from a user of the device that includes the SOC. In response to detecting the predetermined pattern, the circuit may cause the memory controller to power up so that audio samples may be stored in the memory to which the memory controller is coupled. The circuit may also cause the CPUs to be powered on and initialized, and the operating system (OS) may boot. During the time that the CPUs are initializing and the OS is booting, the circuit and the memory may be capturing the audio samples.
30 Citations
16 Claims
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1. An integrated circuit comprising:
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one or more processors; at least one memory controller; and a first circuit coupled to the one or more processors and to the memory controller, wherein the first circuit is configured to remain powered up during times that the one or more processors and the memory controller are powered down, and wherein the first circuit is configured to receive audio samples captured by one or more audio input devices and to detect a predetermined pattern in the audio samples during a time that the one or more processors and the memory controller are powered down, and wherein the first circuit is configured to cause the memory controller and the one or more processors to power up responsive to detecting the predetermined pattern, and wherein the first circuit is configured to write the audio samples that match the predetermined pattern and subsequently-received samples to memory through the memory controller subsequent to powering up the memory controller in response to detecting the predetermined pattern, including writing audio samples to the memory through the memory controller during a time; (1) after the memory controller and the one or more processors are powered up but the one or more processors are still booting an operating system; (2) the memory controller is available to accept write operations; and (3) prior to the one or more processors being ready to operate on the audio samples, whereby the audio samples that match the predetermined pattern are available in the memory for the one or more processors to verify the match subsequent to powering up responsive to the first circuit detecting the match; and wherein the first circuit comprises a buffer configured to store a plurality of the audio samples, wherein a number of the plurality of audio samples is sufficient to store the audio samples that match the predetermined pattern and the subsequently-received samples until the memory controller is available to receive writes of the audio samples to the memory. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A system comprising:
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an audio input device; an audio coder/decoder (codec) coupled to the audio input device and configured to generate audio samples from sound detected by the audio input device; a memory; and an integrated circuit coupled to the audio codec and the memory, wherein the integrated circuit includes an audio filter, one or more processors, and a memory controller coupled to the memory, and wherein the audio filter is configured to detect a predetermined pattern in the audio samples from the audio codec during a time that the memory controller and the one more processors are powered down and is configured to cause the memory controller and the one or more processors to power up responsive to detecting the predetermined pattern, wherein the integrated circuit is configured to buffer the audio samples that match the pattern and subsequently-received audio samples until the memory controller is able to accept write operations to write the samples to the memory, and wherein the audio filter is configured to transmit write operations to the memory controller to write audio samples to memory, including during a time; (1) after the memory controller and the one or more processors are powered up but the one or more processors are still booting an operating system; (2) the memory controller is available to accept write operations; and (3) prior to the one or more processors being ready to operate on the audio samples, whereby the audio samples that match the pattern are available in the memory for the one or more processors to verify the match subsequent to powering up responsive to the audio filter detecting the match; and wherein the audio filter comprises a buffer configured to store a plurality of the audio samples, wherein a number of the plurality of audio samples is sufficient to store the audio samples that match the predetermined pattern and the subsequently-received samples until the memory controller is available to receive writes of the audio samples to the memory. - View Dependent Claims (9, 10, 11, 12)
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13. A method comprising:
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powering down a central processing unit (CPU) complex and a memory controller in an integrated circuit; during a time that the CPU complex and the memory controller are powered down, monitoring audio samples in a first circuit within the integrated circuit that remains powered; detecting a predetermined pattern in the audio samples in the first circuit; requesting power up of at least the memory controller in response to the detecting; and ensuring that the audio samples and subsequently-received audio samples are not lost by buffering the audio samples and subsequently-received audio samples in the first circuit until the memory controller is available and writing the buffered audio samples to memory, including during a time; (1) after the memory controller and the one or more processors are powered up but the one or more processors are still booting an operating system; (2) the memory controller is available to accept write operations; and (3) prior to the one or more processors being ready to operate, whereby a continuous stream of audio samples are available for processing in the memory and the audio samples that match the predetermined pattern are available in the memory for the one or more processors to verify the match subsequent to powering up; and wherein the first circuit comprises a buffer configured to store a plurality of the audio samples, wherein a number of the plurality of audio samples is sufficient to store the audio samples that match the predetermined pattern and the subsequently-received samples until the memory controller is available to receive writes of the audio samples to the memory. - View Dependent Claims (14, 15, 16)
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Specification