Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions

• US 10,090,395 B2
• Filed: 01/23/2018
• Issued: 10/02/2018
• Est. Priority Date: 08/12/2002
• Status: Expired due to Term

• Current Assignee: Acorn Semi, LLC (Acorn Technologies, Inc.)
• Original Assignee: Acorn Technologies, Inc.
• Inventors: Grupp, Daniel E., Connelly, Daniel J.
• Primary Examiner(s): Harrison, Monica D
• Application Number:
  US15/877,837
• Publication Number:
  US 20180166552A1
• Time in Patent Office: 252 Days
• Field of Search: 257763
• CPC Class Codes: H01L 21/28537 Deposition of Schottky electrodes
• CPC Class Codes: H01L 29/0895 Tunnel injectors
• CPC Class Codes: H01L 29/16 including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/161 including two or more of the elements provided for in group H01L29/16 , e.g. alloys H01L29/1604 takes precedence
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/66643 with source or drain regions formed by a Schottky barrier or a conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 29/7839 with Schottky drain or source contact
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/806 with Schottky drain or source contact
• CPC Class Codes: H01L 29/812 with a Schottky gate H01L29/7725, H01L29/775, H01L29/778, H01L29/806 take precedence; with Schottky contact on top of heterojunction gate H01L29/802
• CPC Class Codes: H01L 29/872 Schottky diodes

Abstract

An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.

Claims

1. An electrical junction, comprising a region in a semiconductor substrate, a metal electrical contact to said region, and an interface layer between said region and said metal electrical contact, said region being electrically connected to said metal electrical contact through said interface layer and said interface layer comprising a metal oxide and a semiconductor oxide, and being in contact with said region in the semiconductor substrate and said metal electrical contact.

2. The electrical junction of claim 1, wherein the semiconductor oxide comprises an oxide of the region in the semiconductor substrate.

3. The electrical junction of claim 2, wherein the semiconductor oxide has a thickness of approximately 0.1 nm to 5 nm.

4. The electrical junction of claim 1, wherein said region in the semiconductor substrate comprises a source or drain of a transistor.

5. The electrical junction of claim 1, wherein said interface layer has a thickness sufficient to depin a Fermi level of the metal electrical contact in a vicinity of the junction yet thin enough to provide the junction with a specific contact resistivity that is generally dependent on:

a workfunction of the metal electrical contact, a Fermi energy of the semiconductor in the region, or both the workfunction of the metal electrical contact and the Fermi energy of the semiconductor in the region.

6. The electrical junction of claim 1, wherein said interface layer is configured to provide a specific contact resistivity between the metal electrical contact and the region in the semiconductor of less than 10 Ω

-μ

m².

7. The electrical junction of claim 1, wherein said metal electrical contact comprises an alloy of a metal.

8. The electrical junction of claim 1, wherein said metal oxide comprises an oxide of said metal electrical contact.

9. The electrical junction of claim 8, wherein said semiconductor oxide comprises an oxide of the region in the semiconductor substrate.

10. The electrical junction of claim 8, wherein said semiconductor oxide comprises an oxide of the region in the semiconductor substrate.

11. The electrical junction of claim 1, wherein said metal oxide comprises an oxide of titanium.

12. The electrical junction of claim 11, wherein said semiconductor oxide comprises an oxide of silicon.

13. The electrical junction of claim 12, wherein said semiconductor oxide comprises silicon dioxide.

14. The electrical junction of claim 12, wherein said region in the semiconductor substrate comprises an n-type doped source or drain of a transistor.

15. The electrical junction of claim 1, wherein said metal electrical contact comprises titanium.

16. The electrical junction of claim 1, wherein said metal electrical contact comprises tungsten.

17. An electrical junction, comprising:

a source or drain of a transistor, said source or drain comprising a semiconductor,

a metal electrical contact to said source or drain, and

an interface layer disposed between and in contact with said source or drain and said metal electrical contact, said source or drain being electrically connected to said metal electrical contact through said interface layer and said interface layer comprising an oxide of titanium and an oxide of the semiconductor.

18. The electrical junction of claim 17, wherein said metal electrical contact includes titanium.

19. The electrical junction of claim 18, wherein said semiconductor comprises silicon.

20. The electrical junction of claim 17, wherein said metal electrical contact includes tungsten.

21. The electrical junction of claim 20, wherein said semiconductor comprises silicon.

22. The electrical junction of claim 17, wherein said semiconductor comprises silicon.

23. A semiconductor device, comprising:

a semiconductor region,

a metal electrical contact to said semiconductor region, and

an interface layer disposed between and in contact with said semiconductor region and said metal electrical contact, said semiconductor region being electrically connected to said metal electrical contact through said interface layer and said interface layer comprising an oxide of titanium and an oxide of the semiconductor region.

24. The semiconductor device of claim 23, wherein said metal electrical contact includes titanium.

25. The semiconductor device of claim 24, wherein said semiconductor region comprises silicon.

26. The semiconductor device of claim 23, wherein said metal electrical contact includes tungsten.

27. The semiconductor device of claim 26, wherein said semiconductor region comprises silicon.

28. The semiconductor device of claim 23, wherein said semiconductor region comprises silicon.

29. An electrical junction, comprising:

a source or drain of a transistor, said source or drain comprising a semiconductor,

a metal electrical contact to said source or drain, and

an interface layer disposed between and in contact with said source or drain and said metal electrical contact, said source or drain being electrically connected to said metal electrical contact through said interface layer and said interface layer being less than 1 nm thick and comprising an oxide of the semiconductor.

30. The electrical junction of claim 29, wherein the metal electrical contact comprises titanium.