Data processing method, precoding method, and communication device

• US 10,110,341 B2
• Filed: 12/26/2017
• Issued: 10/23/2018
• Est. Priority Date: 01/11/2013
• Status: Active Grant

• Current Assignee: Sun Patent Trust
• Original Assignee: Sun Patent Trust
• Inventors: Murakami, Yutaka, Kimura, Tomohiro, Ouchi, Mikihiro
• Primary Examiner(s): Torres, Juan A
• Application Number:
  US15/854,243
• Publication Number:
  US 20180139009A1
• Time in Patent Office: 301 Days
• Field of Search: 375340267
• CPC Class Codes: H03M 13/255 with Low Density Parity Check [LDPC] codes
• CPC Class Codes: H04B 7/0413 MIMO systems
• CPC Class Codes: H04L 1/0003 by switching between different modulation schemes
• CPC Class Codes: H04L 1/0004 applied to control information
• CPC Class Codes: H04L 1/003 Adaptive formatting arrangements particular to signalling, e.g. variable amount of bits
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence
• CPC Class Codes: H04L 1/0067 Rate matching H04L1/0013 and H04L1/08 take precedence
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04L 1/08 by repeating transmission, e.g. Verdan system H04L1/1858 and H04L1/189 take precedence
• CPC Class Codes: H04L 5/005 of common pilots, i.e. pilots destined for multiple users or terminals

Abstract

An encoder outputs a first bit sequence having N bits. A mapper generates a first complex signal s1 and a second complex signal s2 with use of bit sequence having X+Y bits included in an input second bit sequence, where X indicates the number of bits used to generate the first complex signal s1, and Y indicates the number of bits used to generate the second complex signal s2. A bit length adjuster is provided after the encoder, and performs bit length adjustment on the first bit sequence such that the second bit sequence has a bit length that is a multiple of X+Y, and outputs the first bit sequence after the bit length adjustment as the second bit sequence. As a result, a problem between a codeword length of a block code and the number of bits necessary to perform mapping by a set of modulation schemes is solved.

Claims

1. A transmission device comprising:

mapping circuitry which, in operation, generates a first modulation symbol sequence by applying a first mapping pattern of a 64 Quadrature Amplitude Modulation (QAM) scheme to a first encoded data sequence generated by using a first coding rate and a first code length, and generates a second modulation symbol sequence by applying a second mapping pattern of the 64QAM scheme to a second encoded data sequence generated by using the first coding rate and a second code length;

OFDM signal generation circuitry which, in operation, generates a first OFDM symbol sequence including the first modulation symbol sequence and a second OFDM symbol sequence including the second modulation symbol sequence; and

transmitting circuitry which, in operation, transmits the first OFDM symbol sequence and the second OFDM symbol sequence, wherein

the first code length and the second code length are different from each other,

the first mapping patterns of the 64QAM scheme and the second mapping patterns of the 64QAM scheme are different from each other.

2. A reception device comprising:

reception circuitry which, in operation, receives an input of a signal including a first OFDM symbol sequence and a second OFDM symbol sequence;

OFDM symbol processing circuitry which, in operation, obtains a first modulation symbol sequence from the first OFDM symbol sequence and a second modulation symbol sequence from the second OFDM symbol sequence; and

demapping circuitry which, in operation, demodulates a first encoded data sequence from the first modulation symbol sequence and a second encoded data sequence from the second modulation symbol sequence, wherein

the first encoded data sequence is generated by using a first coding rate and a first code length,

the second encoded data sequence is generated by using the first coding rate and a second code length,

the first code length and the second code length are different from each other,

the demapping circuitry demodulates the first modulation symbol sequence and second modulation symbol sequence by using different mapping patterns of the 64QAM scheme.

3. A transmission method comprising:

generating a first modulation symbol sequence by applying a 64 Quadrature Amplitude Modulation (QAM) scheme to an encoded data sequence generated by using a first coding rate and a first code length, and generating a second modulation symbol sequence by applying the 64QAM scheme to a second encoded data sequence generated by using the first coding rate and a second code length;

generating a first OFDM symbol sequence including the first modulation symbol sequence and a second OFDM symbol sequence including the second modulation symbol sequence; and

transmitting the first OFDM symbol sequence and the second OFDM symbol sequence, wherein

the first code length and the second code length are different from each other,

the first modulation symbol sequence and second modulation symbol sequence are generated by using different mapping patterns of the 64QAM scheme.

4. A reception method comprising:

receiving an input of a signal including a first OFDM symbol sequence and a second OFDM symbol sequence;

obtaining a first modulation symbol sequence from the first OFDM symbol sequence and a second modulation symbol sequence from the second OFDM symbol sequence; and

demodulating a first encoded data sequence from the first modulation symbol sequence and a second encoded data sequence from the second modulation symbol sequence, wherein

the first encoded data sequence is generated by using a first coding rate and a first code length,

the second encoded data sequence is generated by using the first coding rate and a second code length,

the first code length and the second code length are different from each other,

the first modulation symbol sequence and second modulation symbol sequence are demodulated by using different mapping patterns of the 64QAM scheme.