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Power factor correction circuit

  • US 10,122,262 B1
  • Filed: 07/05/2018
  • Issued: 11/06/2018
  • Est. Priority Date: 07/05/2018
  • Status: Active Grant
First Claim
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1. A bridgeless power factor correction (PFC) circuit, comprising:

  • a first node and a second node, wherein one of the first and second nodes is connected to a power supply, and the other of the first and second nodes is connected to the power supply through an inductor;

    a first current path including a first semiconductor device and a first switch element, wherein the first current path is connected between the first and second nodes and configured to allow current to flow during a positive cycle of the power supply to charge the inductor; and

    a second current path including a second semiconductor device and a second switch element, wherein the second current path is connected between the first and second nodes and configured to allow current to flow during a negative cycle of the power supply to charge the inductor,wherein one of the first and the second current paths further comprises a first sensing element and a second sensing element, wherein the first and second sensing elements are oppositely connected in series.

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