Pixel isolation wall, display substrate, their manufacturing methods, and display device

• US 10,128,321 B2
• Filed: 03/01/2016
• Issued: 11/13/2018
• Est. Priority Date: 09/25/2015
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: Li, Wusheng, Shu, Shi, He, Xiaolong
• Primary Examiner(s): Nguyen, Thinh T
• Application Number:
  US15/326,373
• Publication Number:
  US 20170263688A1
• Time in Patent Office: 987 Days
• Field of Search: 257 40, 257 59, 257 72, 257100, 438 82, 438 99, 438 48, 438128, 438157, 438283
• CPC Class Codes: G02F 1/161 Gaskets; Spacers; Sealing of cells; Filling or closing of cells
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H10K 2102/00 Constructional details relating to the organic devices covered by this subclass
• CPC Class Codes: H10K 2102/361 Temperature
• CPC Class Codes: H10K 50/11 characterised by the electroluminescent [EL] layers
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 71/00 Manufacture or treatment specially adapted for the organic devices covered by this subclass
• CPC Class Codes: H10K 71/13 using printing techniques, e.g. ink-jet printing or screen printing
• CPC Class Codes: H10K 71/135 using ink-jet printing

Abstract

The present disclosure provides a pixel isolation wall and its manufacturing method. The pixel isolation wall includes an oleophilic layer arranged on a substrate on which a TFT array and a pixel electrode array is formed, and an oleophobic layer arranged on the oleophilic layer and configured to define, together with the oleophilic layer, a plurality of recess regions corresponding to the pixel electrode array.

Claims

1. A display substrate, comprising a pixel isolation wall, a thin film transistor (TFT) array, a pixel electrode array, and an oleophilic functional display layer,

wherein the pixel isolation wall is on the TFT array and the pixel electrode array and comprises an oleophilic layer and an oleophobic layer arranged on the oleophilic layer, the oleophobic layer is configured to define, together with the oleophilic layer, a plurality of recess regions corresponding to the pixel electrode array,

a side surface of the oleophilic layer defining one recess region of the plurality of recess regions and a side surface of the oleophobic layer defining a same one recess region are in a same vertical plane, and

the oleophilic functional display layer is formed at the plurality of recess regions, and a upper surface of the oleophilic functional display layer is lower than that of the oleophilic layer, and a side surface of the oleophilic functional display layer at one recess region of the plurality of recess regions directly contacts with the side surface of the oleophilic layer defining the one recess region.

2. The display substrate according to claim 1, wherein the oleophilic layer is made of a photoresist.

3. The display substrate according to claim 1, wherein the oleophobic layer is made of SiNx.

4. The display substrate according to claim 1, wherein an upper surface of the oleophobic layer is subjected to hydrophilization.

5. The display substrate according to claim 1, wherein the functional display layer is made of an organic light-emitting material or an electrochromic material.

6. A display device, comprising the display substrate according to claim 1.

13. The display substrate according to claim 2, wherein an upper surface of the oleophobic layer is subjected to hydrophilization.

14. The display substrate according to claim 3, wherein an upper surface of the oleophobic layer is subjected to hydrophilization.

15. A display device, comprising the display substrate according to claim 5.

16. The display substrate according to claim 2, wherein the photoresist has a photosensitivity greater than a predetermined value.

17. The display substrate according to claim 3, wherein the oleophobic layer has a thickness of 900 Å

to 1100 Å

.

18. The display substrate according to claim 17, wherein the oleophobic layer has a thickness of 1000 Å

.

7. A method for manufacturing a display substrate, comprising steps of:

forming an oleophilic layer on a substrate on which a thin film transistor (TFT) array and a pixel electrode array are formed;

forming an oleophobic layer on the oleophilic layer;

applying a photoresist onto the oleophobic layer;

removing the photoresist at a position corresponding to the pixel electrode array;

etching the oleophobic layer at a position corresponding to the pixel electrode array;

etching the oleophilic layer at a position corresponding to the pixel electrode array to enable the oleophilic layer and the oleophobic layer to define a plurality of recess regions corresponding to the pixel electrode array, wherein a side surface of the oleophilic layer defining one recess region of the plurality of recess regions and a side surface of the oleophobic layer defining a same one recess region are in a same vertical plane, and

dripping an oleophilic functional display material into the recess regions to form an oleophilic functional display layer at the recess regions, wherein a upper surface of the oleophilic functional display layer is lower than that of the oleophilic layer, and a side surface of the oleophilic functional display layer at one recess region of the plurality of recess regions directly contacts with the side surface of the oleophilic layer defining the one recess region.

8. The method according to claim 7, wherein the step of forming the oleophilic layer comprises:

applying a material for forming the oleophilic layer onto the substrate on which the TFT array and the pixel electrode array are formed;

baking the material for forming the oleophilic layer at a temperature of 80°

C. to 100°

C. for 3 to 5 minutes;

baking the material for forming the oleophilic layer at a temperature of 90°

C. to 110°

C. for 25 to 35 minutes; and

baking the material for forming the oleophilic layer at a temperature of 220°

C. to 240°

C. for 25 to 35 minutes.

9. The method according to claim 8, wherein the step of etching the oleophilic layer at a position corresponding to the pixel electrode array comprises dry-etching the material for forming the oleophilic layer at a position corresponding to the pixel electrode array through oxygen to form a pixel region.

10. The method according to claim 7, wherein the oleophobic layer is made of SiNx, and

the step of forming the oleophobic layer on the oleophilic layer comprises depositing a SiNx layer having a thickness of 900 Å

to 1100 Å

through plasma-enhanced chemical vapor deposition (PECVD).

11. The method according to claim 10, wherein the step of etching the oleophobic layer at a position corresponding to the pixel electrode array comprises dry-etching the SiNx layer at a position corresponding to the pixel electrode array through SF₆ and Cl₂.

12. The method according to claim 7, wherein subsequent to the step of forming the oleophobic layer on the oleophilic layer, the method further comprises subjecting an upper surface of the oleophobic layer to hydrophilization.