Class-D amplifier circuits
First Claim
1. A Class-D amplifier circuit for amplifying an input signal comprising:
- an output stage comprising at least first and second switches;
a modulator comprising a signal input for receiving said input signal and a clock input for receiving a first clock signal, the modulator being configured to control the duty cycles of said first and second switches within a switching cycle based on said input signal, wherein said switching cycle has a switching frequency based on said clock signal; and
a frequency controller configured to control the frequency of said first clock signal in response to an indication of amplitude of the input signal;
wherein the frequency controller is configured to implement a transition in frequency of said first clock signal from a first switching frequency to a second switching frequency over a period of time, such that the rate of change of switching frequency with time is variable during said transition.
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Abstract
Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.
18 Citations
20 Claims
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1. A Class-D amplifier circuit for amplifying an input signal comprising:
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an output stage comprising at least first and second switches; a modulator comprising a signal input for receiving said input signal and a clock input for receiving a first clock signal, the modulator being configured to control the duty cycles of said first and second switches within a switching cycle based on said input signal, wherein said switching cycle has a switching frequency based on said clock signal; and a frequency controller configured to control the frequency of said first clock signal in response to an indication of amplitude of the input signal; wherein the frequency controller is configured to implement a transition in frequency of said first clock signal from a first switching frequency to a second switching frequency over a period of time, such that the rate of change of switching frequency with time is variable during said transition. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A Class-D amplifier circuit for amplifying an input signal comprising:
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an output stage comprising at least first and second switches; a modulator comprising a signal input for receiving said input signal and a clock input for receiving a first clock signal, the modulator being configured to control the duty cycles of said first and second switches within a switching cycle based on said input signal, wherein said switching cycle has a switching frequency based on said clock signal; and a frequency controller for controlling the frequency of said first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second lower switching amplitude; wherein the frequency controller is configured to transition the frequency of said first clock signal from the first switching frequency to the second switching frequency or from the second switching frequency to the first switching frequency with a non-linear rate of changing frequency. - View Dependent Claims (18)
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19. A Class-D amplifier circuit for amplifying an input signal comprising:
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an output stage comprising at least first and second switches; a modulator comprising a signal input for receiving said input signal and a clock input for receiving a first clock signal, the modulator being configured to control the duty cycles of said first and second switches within a switching cycle based on said input signal, wherein said switching cycle has a switching frequency based on said clock signal; a frequency controller for controlling the frequency of said first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second lower switching amplitude; and wherein the frequency controller comprises a sigma-delta modulator configured to transition the frequency of said first clock signal between the first switching frequency and the second switching frequency over a period of time. - View Dependent Claims (20)
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Specification