Low-loss and fast acting solid-state breaker

• US 10,193,324 B2
• Filed: 01/08/2016
• Issued: 01/29/2019
• Est. Priority Date: 11/13/2015
• Status: Active Grant

• Current Assignee: Excelitas Technologies Corporation (Excelitas Technologies Holdings LLC)
• Original Assignee: Silicon Power Corporation
• Inventors: Waldron, John E., Brandmier, Kenneth, Azotea, James K.
• Primary Examiner(s): Leja, Ronald W
• Assistant Examiner(s): Clark, Christopher
• Application Number:
  US14/991,259
• Publication Number:
  US 20170141560A1
• Time in Patent Office: 1,117 Days
• CPC Class Codes: H02H 3/033 with several disconnections in a preferential order, e.g. following priority of the users, load repartitionH02H3/06 takes precedence
• CPC Class Codes: H02H 3/066 Reconnection being a consequence of eliminating the fault which caused disconnection
• CPC Class Codes: H02H 3/08 responsive to excess current responsive to abnormal temperature caused by excess current H02H5/04
• CPC Class Codes: H02H 3/20 responsive to excess voltage
• CPC Class Codes: H03K 17/567 Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT

Abstract

A circuit including a source, a load, and an isolation circuit for controllably isolating the load from the source. The isolation circuit is disposed between the source and the load. The isolation circuit includes at least one insulated-gate bipolar transistor (IGBT) and at least one gate turn-off thyristor (GTO) in parallel with the insulated-gate bipolar transistor. When no fault condition exists, the GTO is configured to be on to couple the load to the source. When a fault condition exists, the at least one IGBT is configured to turn on. After the at least one IGBT turns on, the at least one GTO is configured to turn off. After a predetermined amount of time after the at least one GTO turns off, the at least one IGBT is configured to turn off.

Claims

1. A circuit for isolating a load from a source, the circuit comprising:

at least one insulated-gate bipolar transistor (IGBT); and

at least one gate turn-off thyristor (GTO) in parallel with the insulated-gate bipolar transistor,

wherein when no fault condition exists, the at least one GTO is configured to be on to couple the load to the source, and

wherein when a fault condition exists;

the at least one IGBT is configured to turn on; and

the at least one GTO is configured to turn off after the at least one IGBT turns on.

2. The circuit of claim 1, wherein

the at least one IGBT comprises a collector, a gate, and an emitter, and

the at least one GTO comprises an anode, a gate, and a cathode,

wherein the collector of the at least one IGBT is connected to the anode of the at least one GTO, and

wherein the emitter of the at least one IGBT is connected to the cathode of the at least one GTO.

3. The circuit of claim 1, wherein the at least one GTO is a super GTO.

4. The circuit of claim 1,

wherein when the fault condition exists,

the at least one IGBT is configured to turn off a predetermined amount of time after the at least one GTO turns off.

5. A circuit comprising:

a source;

a load; and

an isolation circuit disposed between the source and the load, the isolation circuit comprising;

at least one insulated-gate bipolar transistor (IGBT); and

at least one gate turn-off thyristor (GTO) in parallel with the insulated-gate bipolar transistor,

wherein when no fault condition exists the at least one GTO is configured to be on to couple the load to the source, and

wherein when a fault condition exists;

the at least one IGBT is configured to turn on; and

the at least one GTO is configured to turn off after the at least one IGBT turns on.

6. The circuit of claim 5,

wherein when the fault condition exists,

the at least one IGBT is configured to turn off a predetermined amount of time after the at least one GTO turns off.

7. The circuit of claim 6, wherein the predetermined amount of time is based on the operating temperature of the at least one GTO.

8. The circuit of claim 7, wherein the predetermined amount of time is further based on a rate of change of an expected fault current through the at least one IGBT.

9. The circuit of claim 6, wherein the predetermined amount of time is based on a rate of change of an expected fault current through the at least one IGBT.

10. The circuit of claim 5, further comprising a controller configured to detect when a fault condition exists and, when a fault conditions exists, to:

turn on the at least one IGBT;

turn off the at least one GTO after turning on the IGBT; and

turn off the at least one IGBT a predetermined amount of time after turning off the at least one GTO.

11. The circuit of claim 5, wherein

the at least one IGBT comprises a collector, a gate, and an emitter, and

the at least one GTO comprises an anode, a gate, and a cathode,

wherein the collector of the at least one IGBT is connected to the anode of the at least one GTO, and

wherein the emitter of the at least one IGBT is connected to the cathode of the at least one GTO.

12. The circuit of claim 11, further comprising a controller connected to the gate of the at least one IGBT and to the gate of the at least one GTO.

17. The circuit of claim 5, further comprising a reactance in series with the isolation circuit.

13. A circuit comprising:

a source;

a load; and

an isolation circuit disposed between the source and the load, the isolation circuit comprising;

at least one insulated-gate bipolar transistor (IGBT); and

at least one gate turn-off thyristor (GTO) in parallel with the insulated-gate bipolar transistor, wherein;

the at least one IGBT comprises a collector, a gate, and an emitter, and

the at least one GTO comprises an anode, a gate, and a cathode,

wherein;

the collector of the at least one IGBT is connected to the anode of the at least one GTO,

the emitter of the at least one IGBT is connected to the cathode of the at least one GTO, and

a controller connected to the gate of the at least one IGBT and to the gate of the at least one GTO is configured when no fault condition exists to supply a signal to the gate of the at least one GTO and when a fault conditions exists to;

supply a signal to the gate of the at least one IGBT to turn on the at least one IGBT; and

remove the signal from the gate of the at least one GTO to turn off the at least one GTO after turning on the IGBT.

14. The circuit of claim 13, wherein after removing the signal from the gate of the at least one GTO, the circuit is further configured to remove the signal from the gate of the at least one IGBT to turn off the at least one IGBT a predetermined amount of time after turning off the at least one GTO, wherein the predetermined amount of time is based on the operating temperature of the at least one GTO.

15. The circuit of claim 14, wherein the predetermined amount of time is further based on a rate of change of an expected fault current through the at least one IGBT.

16. The circuit of claim 13, wherein after removing the signal from the gate of the at least one GTO, the circuit is further configured to remove the signal from the gate of the at least one IGBT to turn off the at least one IGBT a predetermined amount of time after turning off the at least one GTO, wherein the predetermined amount of time is based on a rate of change of an expected fault current through the at least one IGBT.