Thin film transistor, array substrate and manufacturing method thereof, and display device

• US 10,204,922 B2
• Filed: 01/13/2016
• Issued: 02/12/2019
• Est. Priority Date: 07/31/2015
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd., South China University of Technology
• Original Assignee: BOE Technology Group Co., Ltd., South China University of Technology
• Inventors: Yuan, Guangcai, Yan, Liangchen, Xu, Xiaoguang, Wang, Lei, Peng, Junbiao, Lan, Linfeng
• Primary Examiner(s): Quarterman, Kevin
• Application Number:
  US15/303,357
• Publication Number:
  US 20180138210A1
• Time in Patent Office: 1,126 Days
• CPC Class Codes: G02F 1/133603 with LEDs
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 33/005 Processes

Abstract

A metal oxide thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method of the metal oxide thin film transistor includes forming a gate electrode (141), a gate insulating layer (130), an active layer (113) and source and drain electrodes (121, 122) of a thin film transistor on a base substrate. The active layer is prepared by using a metal oxide thin film, and an electrochemical oxidation process is performed on the metal oxide thin film during preparing the active layer, and the metal oxide thin film after the electrochemical oxidation process is patterned to form the active layer of the thin film transistor. By using the manufacturing method of the embodiment, oxygen vacancies of the metal oxide thin film can be reduced, a concentration of free carriers thereof can be controlled, the prepared thin film transistor has good stability, and it is not necessary to add additional photolithography process, slightly affecting the cost.

Claims

1. A manufacturing method of a metal oxide thin film transistor, comprising forming a gate electrode, a gate insulating layer, an active layer and source and drain electrodes of a thin film transistor on a base substrate,

wherein the active layer is prepared by using a metal oxide thin film, and an electrochemical oxidation process is performed on the metal oxide thin film during preparing the active layer, and the metal oxide thin film after the electrochemical oxidation process is patterned to form the active layer of the thin film transistor, and

wherein performing the electrochemical oxidation process on the metal oxide thin film includes:

taking the metal oxide thin film as an anode, placing a cathode and the base substrate where the metal oxide thin film has been formed in an electrolyte solution, and then energizing to perform the electrochemical oxidation process.

2. The manufacturing method of the metal oxide thin film transistor according to claim 1, wherein the metal oxide includes zinc oxide, indium zinc oxide or indium gallium zinc oxide.

3. The manufacturing method of the metal oxide thin film transistor according to claim 1, wherein a material of the cathode includes graphite or a metallic material.

4. The manufacturing method of the metal oxide thin film transistor according to claim 1, wherein a voltage of 2 to 100 V is applied between the metal oxide thin film and the cathode.

5. The manufacturing method of the metal oxide thin film transistor according to claim 4, wherein a duration for applying the voltage is 5 to 90 minutes.

6. The manufacturing method of the metal oxide thin film transistor according to claim 1, wherein the electrolyte solution includes a mixed aqueous solution containing ammonium tartrate and ethylene glycol.

7. The manufacturing method of the metal oxide thin film transistor according to claim 1, further comprising forming a water and oxygen barrier layer or a buffer layer,

wherein the water and oxygen barrier layer or the buffer layer is arranged between the base substrate and the metal oxide thin film.

8. The manufacturing method of the metal oxide thin film transistor according to claim 7, wherein the water and oxygen barrier layer or the buffer layer includes any one of SiNx or SiOx.

9. The manufacturing method of the metal oxide thin film transistor according to claim 1, wherein the base substrate is a glass substrate or a flexible substrate.

10. The manufacturing method of the metal oxide thin film transistor according to claim 9, wherein the flexible substrate includes a flexible base substrate of any one selected from the group consisting of polyethylene naphthalate, polyethylene terephthalate, polyimide and metal foil.

11. A metal oxide thin film transistor, fabricated by using the method according to claim 1.

12. A manufacturing method of an array substrate, comprising the manufacturing method of the thin film transistor according to claim 1.

13. The manufacturing method of the array substrate according to claim 12, further comprising forming a gate line and a data line intersecting with each other, wherein, the gate line is connected with the gate electrode, and the data line is connected with the source electrode.

14. The manufacturing method of the array substrate according to claim 12, further comprising forming a passivation layer and a pixel electrode, wherein, the pixel electrode is connected with a drain electrode of the thin film transistor.

15. An array substrate, comprising the metal oxide thin film transistor according to claim 11.

16. A display device, comprising the array substrate according to claim 15.

17. The display device according to claim 16, comprising a liquid crystal display device, an active matrix organic light emitting diode display device or an electronic paper display device.

18. The manufacturing method of the metal oxide thin film transistor according to claim 3, wherein a voltage of 2 to 100 V is applied between the metal oxide thin film and the cathode.