Multi-stage voltage multiplication circuit for inverting a direct current power signal

• US 10,218,275 B2
• Filed: 08/02/2017
• Issued: 02/26/2019
• Est. Priority Date: 08/02/2016
• Status: Active Grant

• Current Assignee: Smart Prong Technologies, Inc.
• Original Assignee: Smart Prong Technologies, Inc.
• Inventors: Sandusky, Randall L., Farooqi, Neaz E.
• Primary Examiner(s): Zhang, Jue
• Assistant Examiner(s): Lee, Jye-June
• Application Number:
  US15/667,419
• Publication Number:
  US 20180041114A1
• Time in Patent Office: 573 Days
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/24 by static converters
• CPC Class Codes: H02M 3/285 Single converters with a plurality of output stages connected in parallel parallel operation of a plurality of converters in dc distribution networks H02J1/10
• CPC Class Codes: H02M 7/44 by static converters
• CPC Class Codes: H02M 7/48 using discharge tubes with control electrode or semiconductor devices with control electrode
• CPC Class Codes: Y02E 10/56 Power conversion systems, e.g. maximum power point trackers

Abstract

A boost circuit receives a DC signal at a first voltage, a duty clock, a reference at a second voltage, and a second intermediate signal at a fourth voltage; compares the reference and the second intermediate signal; generates a first intermediate signal at a third voltage based on the duty clock and the comparison of the reference and the second intermediate signal; and adjusts the third voltage to cause the fourth voltage to approach the second voltage based on the comparison of the reference and the second intermediate signal. The voltage converter receives the first intermediate signal at the second voltage and a clock and generates the second intermediate signal at the fourth voltage, which may be greater than the third voltage. The voltage driver receives the second intermediate signal at the fourth voltage and generates an AC signal at an AC voltage based on the second intermediate signal.

Claims

1. A system, comprising:

a boost circuit configured to;

receive a direct current (DC) signal at a first DC voltage, a duty clock signal, and a reference DC signal at a second DC voltage, wherein the duty clock signal controls a duty cycle of components within the boost circuit;

generate a first intermediate DC signal at a third DC voltage based on the duty clock signal and a comparison of the reference DC signal and a second intermediate DC signal received at a fourth DC voltage, wherein the boost circuit is further configured to adjust the third DC voltage of the first intermediate DC signal to cause the fourth DC voltage of the second intermediate DC signal to approach the second DC voltage of the reference DC signal based on the comparison of the reference DC signal and the second intermediate DC signal;

a voltage converter circuit electrically coupled to the boost circuit and configured to;

receive the first intermediate DC signal at the third DC voltage;

receive a clock signal; and

generate the second intermediate DC signal at the fourth DC voltage, wherein the fourth DC voltage of the second intermediate DC signal is greater than the third DC voltage of the first intermediate DC signal;

a voltage driver circuit electrically coupled to the voltage converter circuit and configured to;

receive the second intermediate DC signal at the fourth DC voltage; and

generate an alternating current (AC) signal at an AC voltage based on the second intermediate DC signal at the fourth DC voltage;

a low voltage circuit electrically coupled to the boost circuit, the voltage converter circuit, and the voltage driver circuit and configured to;

determine a current of the first intermediate DC signal;

determine the fourth DC voltage of the second intermediate DC signal;

generate the duty clock signal based on the second intermediate DC signal at the fourth DC voltage, wherein the duty clock signal adjusts a duty cycle of the boost circuit;

generate the clock signal based on the current of the first intermediate DC signal and the fourth DC voltage of the second intermediate DC signal, wherein the clock signal adjusts a clock rate within the voltage converter circuit; and

transmit the clock signal to the voltage converter circuit.

2. The system of claim 1, further comprising an LC filter circuit electrically coupled to the voltage driver circuit and configured to:

receive the AC signal at the AC voltage; and

generate a filtered AC signal based on the AC signal at the AC voltage.

3. The system of claim 1, the low voltage circuit comprising a voltage/current determination circuit electrically coupled to the boost circuit and the voltage converter circuit and configured to:

determine the current of the first intermediate DC signal;

determine the fourth DC voltage of the second intermediate DC signal;

generate the duty clock signal based on the second intermediate DC signal at the fourth DC voltage; and

generate a control signal based on the current of the first intermediate DC signal and the fourth DC voltage of the second intermediate DC signal.

4. The system of claim 3, the low voltage circuit further comprising:

a maximum power point (MPPT) controller circuit electrically coupled to the voltage/current determination circuit and configured to;

receive the control signal; and

generate a clock control signal based on the control signal; and

a converter controller electrically coupled to the MPPT controller circuit and the voltage converter circuit and configured to;

receive the clock control signal;

generate the clock signal based on the clock control signal; and

transmit the clock signal to the voltage converter circuit.

5. The system of claim 1, wherein the clock signal comprises a pulse width modulated signal.

6. The system of claim 1, wherein the boost circuit comprises:

a comparator circuit electrically coupled to the voltage converter circuit and configured to;

receive the reference DC signal at the second DC voltage;

receive the second intermediate DC signal at the fourth DC voltage;

compare the reference DC signal and the second intermediate DC signal; and

generate a comparison signal based on the comparison of the reference DC signal and the second intermediate DC signal;

a servo loop control circuit electrically coupled to the comparator circuit and configured to;

receive the comparison signal; and

generate a gate driver signal based on the comparison signal; and

a switching inductive circuit electrically coupled to the servo loop control circuit and configured to;

receive the DC signal at the first DC voltage, the duty clock signal, and the gate driver signal; and

generate the first intermediate DC signal at the third DC voltage based on the duty clock signal and the gate driver signal, wherein the switching inductive circuit is further configured to adjust the third DC voltage of the first intermediate DC signal to cause the fourth DC voltage of the second intermediate DC signal to approach the second DC voltage of the reference DC signal based on the gate driver signal and the duty clock signal.

7. The system of claim 6, wherein the switching inductive circuit comprises a MOSFET comprising a gate, an inductor, and a diode.

8. The system of claim 1, wherein the voltage converter circuit comprises a voltage converter stage circuit comprising N-Channel devices electrically coupled to the boost circuit and the voltage driver circuit and is configured to:

receive the first intermediate DC signal at the second DC voltage;

receive the clock signal, wherein the clock signal modifies a frequency of the clock rate within the voltage converter stage circuit; and

generate the second intermediate DC signal at the fourth DC voltage, wherein the fourth DC voltage of the second intermediate DC signal is greater than the third DC voltage of the first intermediate DC signal.

9. The system of claim 8, wherein the voltage converter circuit further comprises:

a plurality of first capacitive elements electrically coupled in parallel with the voltage converter stage circuit;

a second capacitive element electrically coupled to the boost circuit, the voltage converter stage circuit, and ground; and

a third capacitive element electrically coupled to the voltage converter stage circuit, the voltage driver circuit, and ground.

10. The system of claim 1, wherein the boost circuit and the voltage converter circuit operate in a regulated state.

11. The system of claim 1, wherein the voltage converter circuit comprises a first voltage converter circuit, the system further comprising a second voltage converter circuit electrically coupled in parallel with the first voltage converter circuit.

12. A system, comprising:

a boost circuit comprising;

a comparator circuit configured to;

receive a reference DC signal at a second DC voltage;

generate a comparison signal based on a comparison of the reference DC signal and a second intermediate DC signal received at a fourth DC voltage;

a servo loop control circuit electrically coupled to the comparator circuit and configured to;

receive the comparison signal; and

generate a gate driver signal based on the comparison signal; and

a switching inductive circuit electrically coupled to the servo loop control circuit and a voltage converter circuit and configured to;

receive a DC signal at a first DC voltage and a duty clock signal, wherein the duty clock signal controls a duty cycle of components within the boost circuit; and

generate a first intermediate DC signal at a third DC voltage based on the duty clock signal and the gate driver signal;

the voltage converter circuit electrically coupled to the switching inductive circuit and the comparator circuit and configured to;

receive the first intermediate DC signal at the third DC voltage;

receive a clock signal; and

generate the second intermediate DC signal at the fourth DC voltage, wherein the fourth DC voltage of the second intermediate DC signal is greater than the third DC voltage of the first intermediate DC signal, and wherein the switching inductive circuit is configured to adjust the third DC voltage of the first intermediate DC signal to cause the fourth DC voltage of the second intermediate DC signal to approach the second DC voltage of the reference DC signal based on the gate driver signal and the duty clock signal;

a voltage driver circuit electrically coupled to the voltage converter circuit and configured to;

receive the second intermediate DC signal at the fourth DC voltage; and

generate an AC signal at an AC voltage based on the second intermediate DC signal at the fourth DC voltage; and

an LC filter circuit electrically coupled to the voltage driver circuit and configured to;

receive the AC signal at the AC voltage; and

generate a filtered AC signal based on the AC signal at the AC voltage;

a low voltage circuit electrically coupled to the boost circuit, the voltage converter circuit, and the voltage driver circuit and configured to;

determine a current of the first intermediate DC signal;

determine the fourth DC voltage of the second intermediate DC signal;

generate the duty clock signal based on the second intermediate DC signal at the fourth DC voltage, wherein the duty clock signal adjusts a duty cycle of the boost circuit;

generate the clock signal based on the current of the first intermediate DC signal and the fourth DC voltage of the second intermediate DC signal, wherein the clock signal adjusts a clock rate within the voltage converter circuit; and

transmit the clock signal to the voltage converter circuit.

13. The system of claim 12, the low voltage circuit comprising:

a voltage/current determination circuit electrically coupled to the boost circuit and the voltage converter circuit and configured to;

determine the current of the first intermediate DC signal;

determine the fourth DC voltage of the second intermediate DC signal;

generate the duty clock signal based on the second intermediate DC signal at the fourth DC voltage; and

generate a control signal based on the current of the first intermediate DC signal and the fourth DC voltage of the second intermediate DC signal;

an MPPT controller circuit electrically coupled to the voltage/current determination circuit and configured to;

receive the control signal; and

generate a clock control signal based on the control signal; and

a converter controller electrically coupled to the MPPT controller circuit and the voltage converter circuit and configured to;

receive the clock control signal;

generate the clock signal based on the clock control signal; and

transmit the clock signal to the voltage converter circuit.