Booting and power management
First Claim
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1. A method for coordinating operations between a first processor and a secondary processor in a device, comprising:
- initiating, by the first processor, a power management process transitioning the first processor from a first state to a second state;
notifying, by the first processor, the secondary processor of the power management process upon reaching a predetermined step in the power management process;
initiating, by the secondary processor, a parallel power management process transitioning the secondary processor from an equivalent first state to an equivalent second state in response to the notifying; and
polling, by the first processor, the secondary processor upon reaching a later predetermined step in the power management process and waiting for a status of the secondary processor to satisfy a predefined condition before continuing the power management process.
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Abstract
A computing device may comprise a first processor and a secondary processor. The first processor may initiate a power management process transitioning the first processor from a first state to a second state and, upon reaching a predetermined step in the power management process, notify the secondary processor of the power management process. The secondary processor may initiate, in response to the notifying, a parallel power management process transitioning the secondary processor from an equivalent first state to an equivalent second state.
53 Citations
30 Claims
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1. A method for coordinating operations between a first processor and a secondary processor in a device, comprising:
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initiating, by the first processor, a power management process transitioning the first processor from a first state to a second state; notifying, by the first processor, the secondary processor of the power management process upon reaching a predetermined step in the power management process; initiating, by the secondary processor, a parallel power management process transitioning the secondary processor from an equivalent first state to an equivalent second state in response to the notifying; and polling, by the first processor, the secondary processor upon reaching a later predetermined step in the power management process and waiting for a status of the secondary processor to satisfy a predefined condition before continuing the power management process. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computing device comprising:
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a first processor; a secondary processor; and a set of instructions, that when executed by a processor selected from a group consisting of the first processor and the secondary processor, causes; the first processor to initiate a power management process transitioning the first processor from a first state to a second state; the first processor to notify, upon reaching a predetermined step in the power management process, the secondary processor of the power management process; the secondary processor to initiate a parallel power management process transitioning the secondary processor from an equivalent first state to an equivalent second state in response to the notifying; and the first processor to poll, upon reaching a later predetermined step in the power management process, the secondary processor and wait for a status of the secondary processor to satisfy a predefined condition before continuing the power management process. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method for coordinating cold boot operations between a first processor and a secondary processor in a device, the method comprising:
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supplying power to the first processor; supplying power to the secondary processor; initiating, by the first processor, a boot process; initializing the secondary processor; upon reaching a predetermined step in the boot process, transferring, by the first processor, a boot payload to the secondary processor; initiating, by the secondary processor, a parallel boot process using the boot payload after receipt of the boot payload; and checking, by the first processor, a progress of the parallel boot process being performed by the secondary processor. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22)
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23. A computing device comprising:
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a first processor; a secondary processor; a power supply supplying power to the first processor and the secondary processor; and a set of instructions, that when executed by a processor selected from a group consisting of the first processor and the secondary processor after power is supplied by the power supply to the first processor and the secondary processor in a cold boot, causes; the first processor to initiate a boot process; the secondary processor to initialize; the first processor to transfer, upon reaching a predetermined step in the boot process, a boot payload to the secondary processor; the secondary processor to initiate a parallel boot process using the boot payload after receipt of the boot payload; and the first processor to check a progress of the parallel boot process being performed by the secondary processor. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30)
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Specification