Placement of vias in printed circuit board circuits

• US 10,231,325 B1
• Filed: 12/20/2016
• Issued: 03/12/2019
• Est. Priority Date: 12/20/2016
• Status: Active Grant

• Current Assignee: Juniper Networks Incorporated
• Original Assignee: Juniper Networks Incorporated
• Inventors: Chengson, David P., Chang, Edward C., Doppalapudi, Ranjeeth, Pappu, Santosh Kumar
• Primary Examiner(s): Nguyen, Hoa C
• Application Number:
  US15/385,161
• Time in Patent Office: 812 Days
• CPC Class Codes: H05K 1/0222 for shielding around a single via or around a group of vias, e.g. coaxial vias or vias surrounded by a grounded via fence
• CPC Class Codes: H05K 1/0228 Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors balanced signal pairs H05K1/0245
• CPC Class Codes: H05K 1/0231 Capacitors or dielectric substances
• CPC Class Codes: H05K 1/0245 Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
• CPC Class Codes: H05K 1/0251 related to vias or transitions between vias and transmission lines
• CPC Class Codes: H05K 1/113 Via provided in pad; Pad over filled via
• CPC Class Codes: H05K 1/116 Lands, clearance holes or other lay-out details concerning the surrounding of a via
• CPC Class Codes: H05K 1/181 associated with surface mounted components
• CPC Class Codes: H05K 2201/10015 Non-printed capacitor
• CPC Class Codes: H05K 3/0005 for designing circuits by computer
• CPC Class Codes: H05K 3/4007 Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457
• CPC Class Codes: H05K 3/4038 Through-connections; Vertical interconnect access [VIA] connections H05K3/403, H05K3/42 take precedence

Abstract

In some examples, an electronic device includes a printed circuit board (PCB) device that includes a first trace electrically connected to a first pad of a first trace via on a first layer and a second trace electrically connected to a second pad of a second trace via on a second layer. In some examples, the PCB device also includes four ground pads on the first layer and an antipad surrounding the two trace vias, where a first ground pad is positioned between the first trace and the second trace, where the first ground pad and the second ground pad are approximately symmetrically positioned about a perpendicular bisector of a line from the first pad to the second pad, and wherein the third ground pad and the fourth ground pad are approximately symmetrically positioned about the perpendicular bisector of the line from the first pad to the second pad.

Claims

1. An electronic device comprising a printed circuit board (PCB) device comprising:

a first trace on a first layer;

a second trace on a second layer, wherein the second trace is electrically isolated from the first trace;

a first trace via including a first pad on the first layer, wherein the first pad is electrically connected to the first trace;

a second trace via including a second pad on the second layer, wherein the second pad is electrically connected to the second trace;

at least one antipad surrounding the first trace via and the second trace via;

a first ground via electrically connected to a ground plane, wherein the first ground via includes a first ground pad on the first layer positioned between and surrounded by the first trace and the second trace, and wherein the first ground pad is approximately centered on a perpendicular bisector of a line from the first pad to the second pad;

a second ground via electrically connected to the ground plane, wherein the second ground via includes a second ground pad; and

a third ground via electrically connected to the ground plane, wherein the third ground via includes a third ground pad, wherein the second ground pad and the third ground pad are approximately symmetrically positioned about the perpendicular bisector, and wherein each ground pad of the second ground pad and the third ground pad is approximately centered on the line from the first pad to the second pad.

2. The electronic device of claim 1, wherein the at least one antipad comprises a single antipad encompassing the first pad and the second pad.

3. The electronic device of claim 2, wherein:

a longest dimension of the single antipad measured across the antipad is greater than fifteen hundred micrometers and less than three millimeters; and

a shortest dimension of the single antipad measured across the antipad is greater than seven hundred and fifty micrometers and less than fifteen hundred micrometers.

4. The electronic device of claim 1, wherein the one or more antipads comprise a first antipad encompassing the first pad and a second antipad encompassing the second pad, wherein the first antipad and the second antipad are not connected.

5. The electronic device of claim 4, wherein:

a longest dimension of each antipad of the first antipad and the second antipad is less than one thousand micrometers; and

a shortest dimension of each antipad of the first antipad and the second antipad is greater than seven hundred micrometers.

6. The electronic device of claim 1, wherein:

a center-on-center spacing from the first pad to the first ground pad is less than fifteen hundred micrometers; and

a center-on-center spacing from the second pad to the first ground pad is less than fifteen hundred micrometers.

7. The electronic device of claim 1, wherein the first layer and the second layer are a same layer.

8. The electronic device of claim 1, wherein the first layer and the second layer are different layers.

9. The electronic device of claim 1, wherein:

a center-on-center spacing from the first pad to the second ground pad is less than one millimeter; and

a center-on-center spacing from the second pad to the third ground pad is less than one millimeter.