Self-driven AC-DC synchronous rectifier for power applications

• US 10,256,742 B2
• Filed: 03/03/2017
• Issued: 04/09/2019
• Est. Priority Date: 02/12/2010
• Status: Active Grant

• Current Assignee: City University of Hong Kong
• Original Assignee: City University of Hong Kong
• Inventors: Hui, Shu Yuen Ron, Zhong, Wenxing, Choi, Ho Wing
• Primary Examiner(s): Finch, III, Fred E
• Application Number:
  US15/449,881
• Publication Number:
  US 20170179846A1
• Time in Patent Office: 767 Days
• CPC Class Codes: H02M 7/06 using discharge tubes without control electrode or semiconductor devices without control electrode
• CPC Class Codes: H02M 7/217 using semiconductor devices only
• CPC Class Codes: H02M 7/2173 in a biphase or polyphase circuit arrangement H02M7/2176 takes precedence; voltage multipliers H02M7/25
• CPC Class Codes: H02M 7/219 in a bridge configuration
• CPC Class Codes: H02M 7/2195 the switches being synchronously commutated at the same frequency of the AC input voltage
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

Systems, methods, and devices that employ self-driven gate-drive circuitry to facilitate controlling power switches to emulate a diode bridge to synchronously rectify a power signal are presented. A single-phase or multi-phase synchronous rectifier can comprise at least a first pair of switches of a first conducting path and a second pair of switches of a second conducting path that can form or emulate a diode bridge. To facilitate emulating turn-on and turn-off conditions of a diode, a switch can be turned on when voltage across the switch is forward-biased and turned off when switch current is reversed; also, there can be at least one current-controlled switch in each conducting path. Self-driven gate-drive circuitry employs low power components that can facilitate controlling respective switching of the at least first pair and second pair of switches, wherein switching of the switches is also controlled at start-up to emulate a diode bridge.

Claims

1. A system, comprising:

a set of power switches that receive an input power signal and rectify the input power signal to generate a rectified power signal as an output to facilitate synchronous rectification of the input power signal; and

a self-driven gate-drive (SDGD) subsystem that facilitates control of respective switching of respective power switches of the set of power switches, wherein the SDGD subsystem is powered by the rectified power signal or the input power signal, wherein the SDGD subsystem comprises a set of capacitors comprising a first capacitor and a second capacitor, wherein the SDGD subsystem controls respective charging of the first capacitor and the second capacitor to facilitate maintaining a first power switch of the set of power switches in a first switch state during a non-steady state phase of operation of the system until the SDGD subsystem is determined to be operating in steady state,

wherein, at least during a portion of the non-steady state phase, to facilitate the maintaining of the first power switch in the first switch state during the non-steady state phase, the first capacitor and the second capacitor are charged, wherein the second capacitor is charged to a defined voltage level faster than the first capacitor until the second capacitor is charged to the defined voltage level, and wherein, after the second capacitor is charged to the defined voltage level, the first capacitor is charged to a voltage level that is higher than the defined voltage level to which the second capacitor has been charged.

2. The system of claim 1, wherein the set of capacitors comprises a third capacitor, and wherein the SDGD subsystem controls the respective charging of the first capacitor, the second capacitor, and the third capacitor to facilitate maintaining the first power switch in the first switch state during the non-steady state phase of the operation of the system until the SDGD subsystem is determined to be operating in the steady state.

3. The system of claim 1, wherein the set of power switches comprises the first power switch, a second power switch, a third power switch, and a fourth power switch that are associated with and arranged in relation to each other to function as a diode bridge to facilitate the synchronous rectification of the input power signal to generate the rectified power signal.

4. The system of claim 3, wherein the first power switch, the second power switch, the third power switch, and the fourth power switch comprise respective body diodes to facilitate function of the set of power switches as the diode bridge in order to facilitate the synchronous rectification of the input power signal to generate the rectified power signal, during the non-steady state phase of the operation of the system prior to steady-state operation of the SDGD subsystem.

5. The system of claim 3, wherein the input power signal is a multi-phase power signal that has at least three phases, and wherein the set of power switches comprises the first power switch, the second power switch, the third power switch, the fourth power switch, a fifth power switch, and a sixth power switch that are associated with and arranged in relation to each other to function as the diode bridge to facilitate rectification of the multi-phase power signal to generate the rectified power signal.

6. The system of claim 3, wherein the first power switch and the second power switch are voltage-controlled self-driven switches, and the third power switch and the fourth power switch are current-controlled self-driven switches.

7. The system of claim 6, wherein the SDGD subsystem further comprises:

a first SDGD component, a second SDGD component, a third SDGD component, and a fourth SDGD component, wherein the first SDGD component comprises voltage-controlled gate-drive circuitry and is associated with the first power switch, wherein the second SDGD component comprises voltage-controlled gate-drive circuitry and is associated with the second power switch, wherein the third SDGD component comprises current-controlled gate-drive circuitry and is associated with the third power switch, and wherein the fourth SDGD component comprises current-controlled gate-drive circuitry and is associated with the fourth power switch.

8. The system of claim 7, wherein at least one of the first SDGD component, the second SDGD component, the third SDGD component, or the fourth SDGD component receives at least a portion of the rectified power signal to facilitate operation of the at least one of the first SDGD component, the second SDGD component, the third SDGD component, or the fourth SDGD component.

9. The system of claim 6, wherein at least one of the first power switch or the second power switch is respectively configured to be switched from an off state to an on state in response to receipt of a forward-biased voltage that satisfies a defined gate threshold switching voltage level, wherein, with respect to the first power switch, the first switch state is the off state and a second switch state is the on state, and wherein at least one of the third power switch or the fourth power switch is further configured to be switched from a respective on state to a respective off state in response to current in the at least one of the first power switch or the second power switch being reversed.

10. The system of claim 1, wherein the SDGD subsystem further comprises a high-side SDGD portion and a low-side SDGD portion that are symmetrical, and wherein the high-side SDGD portion comprises the set of switches and the set of capacitors to facilitate the control of the switching of the first power switch.

11. The system of claim 1, wherein the input power signal has an input voltage level that is greater than or equal to 100 volts.

12. The system of claim 1, wherein at least the first power switch of the set of power switches is further configured to be a metal-oxide-semiconductor field-effect transistor (MOSFET) switch.

13. A method, comprising:

generating, by an apparatus, a rectified power signal in response to an input power signal received by a set of power switches to facilitate a synchronous rectification of the input power signal, wherein at least a portion of the rectified power signal is supplied to a self-driven gate-drive (SDGD) subsystem associated with the set of power switches to facilitate controlling respective switching of respective power switches of the set of power switches, and wherein the SDGD subsystem comprises a set of capacitors comprising a first capacitor and a second capacitor; and

controlling respective charging of the first capacitor and the second capacitor to facilitate maintaining a first power switch of the set of power switches in, or switching the first power switch to, a first switch state during a non-steady state phase of operation of the SDGD subsystem until the SDGD subsystem is determined to be operating in a steady state,

wherein, at least during a portion of the non-steady state phase, to facilitate the maintaining of the first power switch in, or switching the first power switch to, the first switch state during the non-steady state phase, the first capacitor and the second capacitor are respectively charged to have the second capacitor charged to a defined voltage faster than the first capacitor until the second capacitor is charged to the defined voltage, and wherein, after the second capacitor is charged to the defined voltage, the first capacitor is charged to a first voltage that is higher than the defined voltage to which the second capacitor has been charged.

14. The method of claim 13, wherein the set of capacitors comprises a third capacitor, and wherein the controlling further comprises controlling the respective charging of the first capacitor, the second capacitor, and the third capacitor to charge the first capacitor to the first voltage that is higher than a second voltage of the second capacitor before the third capacitor is charged to a third voltage that facilitates switching the first power switch from the first switch state to a second switch state, wherein the second voltage is the defined voltage, and wherein the controlling of the respective charging of the first capacitor, the second capacitor, and the third capacitor facilitates maintaining the first power switch in the first switch state during the non-steady state phase until the SDGD subsystem is determined to be operating in the steady state.

15. The method of claim 13, wherein the set of power switches comprises the first power switch that is a first high-side power switch, at least one other high-side power switch, a first low-side power switch, and at least one other low-side power switch that are associated with each other and arranged with respect to each other to emulate functionality of a diode bridge rectifier to facilitate the synchronous rectification of the input voltage signal to generate the rectified power signal.

16. The method of claim 13, wherein the set of power switches comprises the first power switch that is a first high-side power switch, at least one other high-side power switch, a first low-side power switch, and at least one other low-side power switch, and wherein the method further comprises:

controlling switching of at least one of the first high-side power switch or the at least one other high-side power switch to switch from an off state to an on state in response to receiving a forward-biased voltage that satisfies a defined gate threshold switching voltage level, wherein the first switch state is the off state; and

controlling switching of at least one of the first low-side power switch or the at least one other low-side power switch to switch from a respective on state to a respective off state in response to sensing a reversing of current in at least one of the first low-side power switch or the at least one other low-side power switch.

17. The method of claim 13, wherein the set of power switches comprises the first power switch that is a first high-side power switch, at least one other high-side power switch, a first low-side power switch, and at least one other low-side power switch, and wherein the method further comprises:

during a period of time that the SDGD subsystem is not operating in the steady state, controlling switching of at least one of the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, or the at least one other low-side power switch to have at least one of the first high-side power switch, the at least one other high-side power switch, the first low-side power switch, or the at least one other low-side power switch be in an off state.

18. A device, comprising:

a set of power switches configured to receive an input voltage signal and rectify the input voltage signal to generate a rectified voltage signal as an output; and

a self-driven gate-drive (SDGD) subsystem configured to control respective switching of respective power switches of the set of power switches, wherein the SDGD subsystem is configured to receive at least a portion of the rectified voltage signal, wherein the SDGD subsystem comprises a set of capacitor components comprising a first capacitor component and a second capacitor component, and wherein the SDGD subsystem is configured to control respective charging of the first capacitor component and the second capacitor component to facilitate maintaining a first power switch of the set of power switches in a first switch state during initiation of operation of the SDGD subsystem until the SDGD subsystem is operating in a steady state,

wherein, at least during a portion of the initiation of the operation of the SDGD subsystem prior to the SDGD subsystem operating in the steady state, to facilitate the maintaining of the first power switch in the first switch state during the initiation of the operation of the SDGD subsystem until the SDGD subsystem is operating in the steady state, the first capacitor component and the second capacitor component are respectively charged to have the second capacitor component be charged to a defined voltage level quicker than the first capacitor component until the second capacitor component is charged to the defined voltage level, and wherein, after the second capacitor component is charged to the defined voltage level, the first capacitor component is charged to a voltage level that is higher than the defined voltage level to which the second capacitor component has been charged.

19. The device of claim 18, wherein the set of capacitor components comprises a third capacitor component, and wherein the SDGD subsystem is configured to control respective charging of the first capacitor component, the second capacitor component, and the third capacitor component to facilitate the maintaining of the first power switch in the first switch state at least during a period of time that the SDGD subsystem is determined to not be operating in the steady state, until the SDGD subsystem is determined to be operating in the steady state, and wherein the first switch state is an off state.

20. The device of claim 18, wherein the set of power switches comprises the first power switch, a second power switch, a third power switch, and a fourth power switch that are configured to be associated with and arranged in relation to each other to operate as a diode bridge to facilitate the input voltage signal being rectified to generate the rectified voltage signal.