Process module for increasing the response of backside illuminated photosensitive imagers and associated methods

• US 10,269,861 B2
• Filed: 05/30/2017
• Issued: 04/23/2019
• Est. Priority Date: 06/09/2011
• Status: Active Grant

• Current Assignee: SiOnyx, LLC (Black Silicon Holdings, Inc.)
• Original Assignee: SiOnyx, LLC (Black Silicon Holdings, Inc.)
• Inventors: Haddad, Homayoon, McKee, Jeffrey, Jiang, Jutao, Miller, Drake, Palsule, Chintamani, Forbes, Leonard
• Primary Examiner(s): Amer, Mounir S
• Assistant Examiner(s): Belousov, Alexander
• Application Number:
  US15/607,706
• Publication Number:
  US 20170263671A1
• Time in Patent Office: 693 Days
• CPC Class Codes: H01L 27/1462 Coatings
• CPC Class Codes: H01L 27/14629 Reflectors
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 27/14692 Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon
• CPC Class Codes: H01L 31/0232 Optical elements or arrangements associated with the device H01L31/0236 takes precedence; for photovoltaic cells H01L31/054; for photovoltaic modules H02S40/20
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: H04H 20/57 for mobile receivers
• CPC Class Codes: H04H 20/59 for emergency or urgency
• CPC Class Codes: H04H 20/72 of terrestrial networks
• CPC Class Codes: H04W 4/90 Services for handling of emergency or hazardous situations, e.g. earthquake and tsunami warning systems [ETWS]
• CPC Class Codes: H04W 48/16 Discovering, processing access restriction or access information

Abstract

Backside illuminated photosensitive devices and associated methods are provided. In one aspect, for example, a backside-illuminated photosensitive imager device can include a semiconductor substrate having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor substrate and positioned to interact with electromagnetic radiation where the textured region includes surface features sized and positioned to facilitate tuning to a preselected wavelength of light, and a dielectric region positioned between the textured region and the at least one junction. The dielectric region is positioned to isolate the at least one junction from the textured region, and the semiconductor substrate and the textured region are positioned such that incoming electromagnetic radiation passes through the semiconductor substrate before contacting the textured region. Additionally, the device includes an electrical transfer element coupled to the semiconductor substrate to transfer an electrical signal from the at least one junction.

Claims

1. A method of making a backside-illuminated photosensitive imager device, comprising:

forming at least one junction at a surface of a semiconductor substrate;

forming a dielectric region over the at least one junction;

forming a textured region over the dielectric region, wherein the textured region includes surface features sized and positioned to facilitate tuning to a preselected wavelength of light, wherein the dielectric region isolates the at least one junction from the textured region, and wherein the semiconductor substrate and the textured region are positioned such that incoming electromagnetic radiation passes through the semiconductor substrate before contacting the textured region; and

coupling an electrical transfer element to the semiconductor substrate such that the electrical transfer element is operable to transfer an electrical signal from the at least one junction.

2. The method of claim 1, wherein forming the textured region is by a process selected from the group consisting of plasma etching, reactive ion etching, porous silicon etching, lasing, chemical etching, nanoimprinting, material deposition, selective epitaxial growth, lithography, and combinations thereof.

3. The method of claim 1, wherein forming the textured region further includes:

depositing a mask on the dielectric region;

etching the dielectric region through the mask to form surface features; and

removing the mask from the dielectric region.

4. The method of claim 3, further comprising etching the surface features to round exposed edges.

5. The method of claim 1, further comprising coupling a lens to the semiconductor substrate at a surface opposite the at least one junction, wherein the lens is positioned to focus incident electromagnetic radiation into the semiconductor substrate.

6. The method of claim 1, wherein forming the textured region further includes:

depositing a first semiconductor material on the dielectric region;

texturing the first semiconductor material to form a mask;

depositing a second semiconductor material on the mask; and

etching the second semiconductor material to form the textured region.

7. The method of claim 6, wherein texturing the second semiconductor material further includes:

etching the second semiconductor material to form a plurality of scallops pointing toward the semiconductor substrate.

8. The method of claim 7, wherein the first and second semiconductor materials includes a member selected from the group consisting of silicon, polysilicon, amorphous silicon, and combinations thereof.

9. The method of claim 1, further comprising depositing an anti-reflective layer on the semiconductor substrate at a surface opposite the at least one junction, such that incident light passes through the anti-reflective layer prior to contacting the semiconductor substrate.

10. The method of claim 9, further comprising forming at least one isolation feature in the semiconductor substrate, the at least one isolation feature being positioned to reflect light impinging thereon back into the semiconductor substrate.