Imaging sensor and imaging device with column ADC

• US 10,321,082 B2
• Filed: 11/21/2017
• Issued: 06/11/2019
• Est. Priority Date: 06/08/2012
• Status: Active Grant

• Current Assignee: Nikon Corporation
• Original Assignee: Nikon Corporation
• Inventors: Murata, Hironobu
• Primary Examiner(s): Ye, Lin
• Assistant Examiner(s): Morehead, III, John H.
• Application Number:
  US15/819,908
• Publication Number:
  US 20180098016A1
• Time in Patent Office: 567 Days
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/77 Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters

Abstract

An imaging sensor comprising: an imaging chip in which a plurality of pixel are arranged in a matrix; and a signal processing chip that is each provided for one or more pixel columns or one or more pixel rows, has a device that performs signal processing on a pixel signal output from a pixel, and is stacked with the imaging chip is provided. For example, the device that performs signal processing is an A/D converter that converts a pixel signal output from the pixel into a digital signal, and when a pixel signal output from the pixel is converted into a digital signal, at least two or more A/D converters among the A/D converters are controlled in parallel.

Claims

1. An imaging sensor comprising:

a pixel unit that has a first area in which a plurality of pixels connected to a first control line are arranged, and a second area in which a plurality of pixels connected to a second control line are arranged, the first control line being different from the second control line;

a signal processing unit stacked on the pixel unit that has a first signal processing circuit that processes a signal output from a first pixel in the first area and a signal output from a second pixel in the second area, and a second signal processing circuit that processes a signal output from a third pixel in the first area and a signal output from a fourth pixel in the second area, the third pixel being different from the first pixel, and the fourth pixel being different from the second pixel, wherein

the first signal processing circuit is arranged at a position that overlaps the first area, and the second signal processing circuit is arranged at a position that overlaps the second area,

a first output interconnection, to which the first pixel and the second pixel output, is connected to the first signal processing circuit via a first connection unit that is provided outside a region in which pixels of the pixel unit are arranged, the first connection unit electrically connecting the pixel unit and the signal processing unit, and

a second output interconnection, to which the third pixel and the fourth pixel output, is connected to the second signal processing circuit via a second connection unit that is different from the first connection unit and that is provided outside a region in which pixels of the pixel unit are arranged, the second connection unit electrically connecting the pixel unit and the signal processing unit.

2. The imaging sensor according to claim 1, wherein

the first connection unit and the second connection unit are provided at locations such that the first connection unit and the second connection unit sandwich the region in which pixels of the pixel unit are arranged.

3. The imaging sensor according to claim 2, wherein

the first connection unit is provided at a location that is closer to the first signal processing circuit than to the second signal processing circuit, and

the second connection unit is provided at a location that is closer to the second signal processing circuit than to the first signal processing circuit.

4. The imaging sensor according to claim 1, wherein

the first connection unit and the second connection unit are through-silicon vias that electrically connect the pixel unit and the signal processing unit.

5. The imaging sensor according to claim 1, wherein

the first signal processing circuit is a first A/D converter that converts the signals output from the first pixel and the second pixel into digital signals, and

the second signal processing circuit is a second A/D converter that converts the signals output from the third pixel and the fourth pixel into digital signals.

6. An imaging device comprising the imaging sensor according to claim 1.