Calibration device for automatic test equipment

• US 10,345,418 B2
• Filed: 11/20/2015
• Issued: 07/09/2019
• Est. Priority Date: 11/20/2015
• Status: Active Grant

• Current Assignee: Teradyne Incorporated
• Original Assignee: Teradyne Incorporated
• Inventors: Wadell, Brian C., Pye, Richard
• Primary Examiner(s): Shah, Neel D
• Application Number:
  US14/947,370
• Publication Number:
  US 20170146632A1
• Time in Patent Office: 1,327 Days
• CPC Class Codes: G01R 1/07342 the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
• CPC Class Codes: G01R 31/2834 Automated test systems [ATE]; using microprocessors or computers G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736
• CPC Class Codes: G01R 31/3191 Calibration
• CPC Class Codes: G01R 35/005 Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references G01R33/0035, G01R35/002 take precedence

Abstract

Example automatic test equipment (ATE) includes: a test instrument for outputting test signals to test a device under test (DUT), and for receiving response signals based on the test signals; a device interface board (DIB) connected to the test instrument, with the DIB including an application space having a site to which the DUT connects, and with the test signals and the response signals passing through the site; and calibration circuitry in the application space on the DIB. The calibration circuitry includes a communication interface over which communications pass, with the communications comprising control signals to the calibration circuitry and measurement signals from the calibration circuitry. The calibration circuitry also includes non-volatile memory to store calibration data and is controllable, based on the control signals, to pass the test signals from the test instrument to the DUT and to pass the response signals from the DUT to the test instrument.

Claims

1. Automatic test equipment (ATE) comprising:

a test instrument for outputting test signals to test a device under test (DUT) and for receiving response signals based on the test signals;

a device interface board (DIB) connected to the test instrument, the DIB comprising an application space having a site to which the DUT connects, the test signals and the response signals to pass through the site; and

calibration circuitry in the application space on the DIB and separate from the test instrument, the calibration circuitry comprising a communication interface over which communications pass, the communications comprising control signals to the calibration circuitry and characteristic signals from the calibration circuitry that represent test signal characteristics at a location of the calibration circuitry, the calibration circuitry comprising non-volatile memory to store calibration data and being controllable, based on the control signals, to pass the test signals from the test instrument to the DUT and to pass the response signals from the DUT to the test instrument;

wherein the test instrument is configured to generate the calibration data based on the characteristic signals.

2. The ATE of claim 1, wherein the DIB comprises sites or pins, and the calibration circuitry is placed adjacent to the sites or pins.

3. The ATE of claim 1, wherein the calibration circuitry comprises a splitter, a combiner, or circuitry that is controllable to pass the test signals to DUTs, and to pass the response signals from the DUTs.

4. The ATE of claim 1, wherein the calibration circuitry comprises a temperature detector to detect a temperature at the calibration circuitry and to output a measurement signal representing the temperature detected.

5. The ATE of claim 1, wherein the calibration circuitry comprises a signal power detector to detect a signal power of at least one of the test signals or the response signals and to output a characteristic signal representing the signal power detected.

6. The ATE of claim 5, wherein the signal power detector is configured to use a reference signal for self-calibration.

7. The ATE of claim 1, wherein the calibration circuitry is isolated electromagnetically from other circuitry in the application space.

8. The ATE of claim 1, wherein the calibration circuitry comprises switch circuitry, and wherein the calibration circuitry further comprises a short circuit, an open circuit, and a known impedance load circuit, the switch circuitry being controllable to send the test signals to at least one of the short circuit, the open circuit, or the known impedance load circuit and to receive reflected signals from the at least one of the short circuit, the open circuit, or the known impedance load circuit.

9. The ATE of claim 8, wherein the calibration circuitry further comprises a verification circuit having a specific calibration, the switch circuitry being controllable to send the test signals to the verification circuit to verify S-parameters determined based on reflected signals from the at least one of the short circuit, the open circuit, or the known impedance load circuit, or based on an impedance standard.

10. The ATE of claim 1, further comprising:

a test computer for orchestrating testing of the DUT; and

a controller to interface between the test computer and the calibration circuitry, the controller for receiving data from the test computer and for generating the control signals to the calibration circuitry based on the data, the controller also for correcting test instrument sourced and/or measured signals based on one or more characteristic signals obtained from the calibration circuitry, the controller for reading stored data from the calibration circuitry and a state of the calibration circuitry.

11. The ATE of claim 1, wherein the calibration circuitry comprises impedance that is tunable based on the control signals and information derived by the calibration circuitry and the test instrument.

12. The ATE of claim 1, wherein the calibration data is specific to the calibration circuitry.

13. The ATE of claim 1, wherein the calibration circuitry comprises at least two switches connected in series.

14. The ATE of claim 1, wherein the calibration circuitry comprises:

a first switch that is controllable to receive the test signals from the test instrument and to output the test signals, and to receive the response signals and to pass the response signals to the test instrument;

a second switch in series with the first switch, the second switch being controllable to receive the test signals output by the first switch and to send the test signals to the DUT, and to receive the response signals from the DUT and to output the response signals to the first switch; and

a third switch in series with the first switch, the third switch being controllable to receive the test signals from the first switch and to send the test signals to one or more of a short circuit, an open circuit, an impedance load circuit, or impedance for determining s-parameter calibration.

15. The ATE of claim 14, wherein the calibration circuitry comprises a power detector, and wherein the first switch is controllable to pass the test signals to the power detector, an output of the power detector being a basis for at least one measurement signal.

16. The ATE of claim 1, wherein the calibration circuit comprises an attenuator or programmable attenuator in a signal path along which the test signals pass.

17. The ATE of claim 1, wherein the calibration circuit comprises an amplifier or a programmable gain amplifier in a signal path along which the test signals pass.

18. The ATE of claim 1, wherein the calibration circuitry comprises:

a power divider or splitter circuit in series with a first switch, the power divider or splitter circuit being configured to receive the test signals and to send the test signals to the DUT, and to receive the response signals from the DUT and to output the response signals.

19. The ATE of claim 1, wherein the calibration circuitry comprises:

a switch that is controllable to receive the test signals from the test instrument and to output the test signals, and to receive the response signals and to pass the response signals to the test instrument; and

a power detector, wherein the switch is controllable to pass the test signals to the power detector, an output of the power detector being a basis for at least one of the characteristic signals.

20. The ATE of claim 1, wherein signals passing through the calibration circuit comprise single ended, differential signals or a conversion of differential to single-ended signals or single-ended to differential signals.

21. Automatic test equipment (ATE) comprising:

a test instrument for outputting test signals to test a device under test (DUT) and for receiving response signals based on the test signals;

a device interface board (DIB) connected to the test instrument, the DIB comprising an application space having a site to which the DUT connects, the test signals and the response signals to pass through the site; and

calibration circuitry in the application space on the DIB and separate from the test instrument, the calibration circuitry comprising a communication interface over which communications pass, the communications comprising control signals to the calibration circuitry and measurement signals from the calibration circuitry, the calibration circuitry comprising non-volatile memory to store calibration data and being controllable, based on the control signals, to pass the test signals from the test instrument to the DUT and to pass the response signals from the DUT to the test instrument;

wherein the calibration circuitry comprises switch circuitry, a short circuit, an open circuit, and a known impedance load circuit, the switch circuitry being controllable to send the test signals to at least one of the short circuit, the open circuit, or the known impedance load circuit and to receive reflected signals from the at least one of the short circuit, the open circuit, or the known impedance load circuit; and

wherein the calibration circuitry further comprises a verification circuit having a specific calibration, the switch circuitry being controllable to send the test signals to the verification circuit to verify S-parameters determined based on reflected signals from the at least one of the short circuit, the open circuit, or the known impedance load circuit, or based on an impedance standard.

22. Automatic test equipment (ATE) comprising:

a test instrument for outputting test signals to test a device under test (DUT) and for receiving response signals based on the test signals;

a device interface board (DIB) connected to the test instrument, the DIB comprising an application space having a site to which the DUT connects, the test signals and the response signals to pass through the site;

calibration circuitry in the application space on the DIB and separate from the test instrument, the calibration circuitry comprising a communication interface over which communications pass, the communications comprising control signals to the calibration circuitry and measurement signals from the calibration circuitry, the calibration circuitry comprising non-volatile memory to store calibration data and being controllable, based on the control signals, to pass the test signals from the test instrument to the DUT and to pass the response signals from the DUT to the test instrument;

a test computer for orchestrating testing of the DUT; and

a controller to interface between the test computer and the calibration circuitry, the controller for receiving data from the test computer and for generating the control signals to the calibration circuitry based on the data, the controller also for correcting test instrument sourced and/or measured signals based on one or more parameters obtained at the calibration circuitry, the controller for reading stored data from the calibration circuitry and a state of the calibration circuitry.

23. Automatic test equipment (ATE) comprising:

a test instrument for outputting test signals to test a device under test (DUT) and for receiving response signals based on the test signals;

a device interface board (DIB) connected to the test instrument, the DIB comprising an application space having a site to which the DUT connects, the test signals and the response signals to pass through the site;

calibration circuitry in the application space on the DIB and separate from the test instrument, the calibration circuitry comprising a communication interface over which communications pass, the communications comprising control signals to the calibration circuitry and measurement signals from the calibration circuitry, the calibration circuitry comprising non-volatile memory to store calibration data and being controllable, based on the control signals, to pass the test signals from the test instrument to the DUT and to pass the response signals from the DUT to the test instrument;

wherein the calibration circuitry comprises;

a first switch that is controllable to receive the test signals from the test instrument and to output the test signals, and to receive the response signals and to pass the response signals to the test instrument;

a second switch in series with the first switch, the second switch being controllable to receive the test signals output by the first switch and to send the test signals to the DUT, and to receive the response signals from the DUT and to output the response signals to the first switch; and

a third switch in series with the first switch, the third switch being controllable to receive the test signals from the first switch and to send the test signals to one or more of a short circuit, an open circuit, an impedance load circuit, or impedance for determining s-parameter calibration.

24. Automatic test equipment (ATE) comprising:

a test instrument for outputting test signals to test a device under test (DUT) and for receiving response signals based on the test signals;

a device interface board (DIB) connected to the test instrument, the DIB comprising an application space having a site to which the DUT connects, the test signals and the response signals to pass through the site;

calibration circuitry in the application space on the DIB and separate from the test instrument, the calibration circuitry comprising a communication interface over which communications pass, the communications comprising control signals to the calibration circuitry and measurement signals from the calibration circuitry, the calibration circuitry comprising non-volatile memory to store calibration data and being controllable, based on the control signals, to pass the test signals from the test instrument to the DUT and to pass the response signals from the DUT to the test instrument;

wherein the calibration circuitry comprises a power divider or splitter circuit in series with a first switch, the power divider or splitter circuit being configured to receive the test signals and to send the test signals to the DUT, and to receive the response signals from the DUT and to output the response signals.