Manufacturing method of circuit board structure

• US 10,356,901 B2
• Filed: 06/14/2018
• Issued: 07/16/2019
• Est. Priority Date: 11/30/2016
• Status: Active Grant

• Current Assignee: Unimicron Technology Corporation
• Original Assignee: Unimicron Technology Corporation
• Inventors: Wu, Ming-Hao, Liu, Wen-Fang
• Primary Examiner(s): Chen, Xiaoliang
• Application Number:
  US16/008,060
• Publication Number:
  US 20180295723A1
• Time in Patent Office: 397 Days
• Field of Search: 174250, 174251, 174254, 174255, 174257-264, 174266, 361746, 361749, 361753, 361762-764, 361767, 361792, 257700, 257702
• CPC Class Codes: H05K 1/111 Pads for surface mounting, e.g. lay-out
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 2201/0376 Flush conductors, i.e. flush with the surface of the printed circuit
• CPC Class Codes: H05K 2203/0228 Cutting, sawing, milling or shearing
• CPC Class Codes: H05K 2203/025 Abrading, e.g. grinding or sand blasting deburring, rounding, bevelling or smoothing conductor edges H05K2203/0346
• CPC Class Codes: H05K 3/0044 Mechanical working of the substrate, e.g. drilling or punching H05K3/0008 takes precedence
• CPC Class Codes: H05K 3/3452 Solder masks
• CPC Class Codes: H05K 3/4697 having cavities, e.g. for mounting components H05K3/4691 takes precedence

Abstract

A manufacturing method of a circuit board structure includes the following steps: providing an inner circuit structure which includes a core layer; performing a build-up process to laminate a first build-up circuit structure on a first patterned circuit layer of the inner circuit structure, wherein the first build-up circuit structure includes an inner dielectric layer, and the inner dielectric layer directly covers an upper surface of the core layer and the first patterned circuit layer; removing a portion of the first build-up circuit structure to form an opening extending from a first surface of the first build-up circuit structure relatively far away from the inner circuit structure to a portion of the inner dielectric layer; performing a sandblasting process on a first inner surface of the inner dielectric layer exposed by the opening to at least remove the portion of the inner dielectric layer exposed by the opening.

Claims

1. A manufacturing method of a circuit board structure, comprising:

providing an inner circuit structure, wherein the inner circuit structure comprises a core layer having an upper surface and a lower surface opposite to each other, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface, and a conductive via connecting the first patterned circuit layer and the second patterned circuit layer;

performing a build-up process to laminate a first build-up circuit structure on the first patterned circuit layer, wherein the first build-up circuit structure at least comprises an inner dielectric layer, and the inner dielectric layer directly covers the upper surface of the core layer and the first patterned circuit layer;

removing a portion of the first build-up circuit structure to form an opening extending from a first surface of the first build-up circuit structure relatively away from the inner circuit structure to a portion of the inner dielectric layer, wherein the opening exposes a first inner surface of the inner dielectric layer; and

performing a sandblasting process on the first inner surface of the inner dielectric layer exposed by the opening to at least remove a portion of the inner dielectric layer exposed by the opening so as to form a cavity at least exposing a portion of the first patterned circuit layer,

wherein the first build-up circuit structure further comprises at least a first dielectric layer, at least a first patterned conductive layer and at least a first conductive via structure penetrating through the inner dielectric layer and the first dielectric layer, the first patterned conductive layer and the first dielectric layer are sequentially stacked on the inner dielectric layer, and the first patterned conductive layer is electrically connected to the first patterned circuit layer via the first conductive via structure,

wherein the cavity further exposes a second inner surface of the inner dielectric layer, the first inner surface is higher than the second inner surface, and a top surface of the portion of the first patterned circuit layer exposed by the cavity is higher than the second inner surface.

2. The manufacturing method of the circuit board structure as recited in claim 1, wherein a cross-sectional profile of an edge of the top surface of the portion of the first patterned circuit layer exposed by the cavity is a curved surface.

3. The manufacturing method of the circuit board structure as recited in claim 1, wherein removing the portion of the first build-up circuit structure comprises performing a depth control routing process or a sandblasting process on the first build-up circuit structure.

4. The manufacturing method of the circuit board structure as recited in claim 1, wherein the sandblasting process is performed on the first inner surface of the inner dielectric layer exposed by the opening to completely remove the inner dielectric layer exposed by the opening and a portion of the core layer so as to form the cavity exposing the portion of the first patterned circuit layer and a first upper surface of the core layer, the upper surface of the core layer comprises the first upper surface and a second upper surface, the second upper surface is higher than the first upper surface, and a top surface of the portion of the first patterned circuit layer exposed by the cavity is higher than the first upper surface.

5. The manufacturing method of the circuit board structure as recited in claim 4, wherein a cross-sectional profile of an edge of the top surface of the portion of the first patterned circuit layer exposed by the cavity is a curved surface.

6. The manufacturing method of the circuit board structure as recited in claim 1, wherein the portion of the first patterned circuit layer exposed by the cavity comprises at least a pad, at least a circuit or a combination thereof.

7. The manufacturing method of the circuit board structure as recited in claim 1, further comprising:

forming a first patterned solder mask layer on at least the first surface of the first build-up circuit structure relatively away from the inner circuit structure and the portion of the first patterned circuit layer exposed by the cavity after forming the cavity at least exposing the portion of the first patterned circuit layer.

8. A manufacturing method of a circuit board structure, comprising:

providing an inner circuit structure, wherein the inner circuit structure comprises a core layer having an upper surface and a lower surface opposite to each other, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface, and a conductive via connecting the first patterned circuit layer and the second patterned circuit layer;

performing a build-up process to laminate a first build-up circuit structure on the first patterned circuit layer, wherein the first build-up circuit structure at least comprises an inner dielectric layer, and the inner dielectric layer directly covers the upper surface of the core layer and the first patterned circuit layer;

removing a portion of the first build-up circuit structure to form an opening extending from a first surface of the first build-up circuit structure relatively away from the inner circuit structure to a portion of the inner dielectric layer, wherein the opening exposes a first inner surface of the inner dielectric layer; and

performing a sandblasting process on the first inner surface of the inner dielectric layer exposed by the opening to at least remove a portion of the inner dielectric layer exposed by the opening so as to form a cavity at least exposing a portion of the first patterned circuit layer,

wherein the sandblasting process is performed on the first inner surface of the inner dielectric layer exposed by the opening to completely remove the inner dielectric layer exposed by the opening and a portion of the core layer so as to form the cavity exposing the portion of the first patterned circuit layer and a first upper surface of the core layer, the upper surface of the core layer comprises the first upper surface and a second upper surface, the second upper surface is higher than the first upper surface, and a top surface of the portion of the first patterned circuit layer exposed by the cavity is higher than the first upper surface.