Hybrid display using inorganic micro light emitting diodes (uLEDs) and organic LEDs (OLEDs)

• US 10,381,335 B2
• Filed: 02/23/2017
• Issued: 08/13/2019
• Est. Priority Date: 10/31/2014
• Status: Active Grant

• Current Assignee: Elux Inc.
• Original Assignee: EHUX Incorporated
• Inventors: Sasaki, Kenji, Schuele, Paul J., Ulmer, Kurt, Lee, Jong-Jan
• Primary Examiner(s): Williams, Joseph L
• Application Number:
  US15/440,735
• Publication Number:
  US 20170179092A1
• Time in Patent Office: 901 Days
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/06181 On opposite sides of the body
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 2224/24145 the bodies being stacked
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 2224/95085 being a liquid, e.g. for fluidic self-assembly
• CPC Class Codes: H01L 2224/95101 in a liquid medium
• CPC Class Codes: H01L 2224/95136 involving guiding structures, e.g. shape matching, spacers or supporting members
• CPC Class Codes: H01L 24/00 Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/95 at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 25/075 the devices being of a type provided for in group H01L33/00
• CPC Class Codes: H01L 25/0753 : the devices being arranged next to each other
• CPC Class Codes: H01L 25/167 : comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2933/0033 : relating to semiconductor body packages
• CPC Class Codes: H10K 59/00 : Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
• CPC Class Codes: H10K 59/1201 : Manufacture or treatment
• CPC Class Codes: H10K 59/123 : Connection of the pixel electrodes to the thin film transistors [TFT]
• CPC Class Codes: H10K 59/35 : comprising red-green-blue [RGB] subpixels
• CPC Class Codes: H10K 59/70 : OLEDs integrated with inorganic light-emitting elements, e.g. with inorganic electroluminescent elements

Abstract

A hybrid light emitting diode (LED) display and fabrication method are provided. The method forms a stack of thin-film layers overlying a top surface of a substrate. The stack includes an LED control matrix and a plurality of pixels. Each pixel is made up of a first subpixel enabled using an inorganic micro LED (uLED), a second subpixel enabled using an organic LED (OLED), and a third subpixel enabled using an OLED. The first subpixel emits a blue color light, the second subpixel emits a red color light, and the third subpixel emits a green color light. In one aspect, the stack includes a plurality of wells in a top surface of the stack, populated by the LEDs. The uLEDs may be configured vertical structures with top and bottom electrical contacts, or surface mount top surface contacts. The uLEDs may also include posts for fluidic assembly orientation.

Claims

1. A hybrid light emitting diode (LED) emissive display comprising:

a substrate;

a stack of thin-films overlying a top surface of the substrate with a plurality of wells formed in a top surface of the thin film stack;

a plurality of pixels formed in the stack, each pixel comprising;

a first subpixel enabled using an inorganic micro LED (uLED) populating a well;

a second subpixel enabled using an organic LED (OLED) populating a well;

a third subpixel enabled using an OLED populating a well;

an LED control matrix configured to selectively enable the LEDs;

an electrical interface matrix layer overlying the stack, connected to each OLED; and

wherein adjacent LEDs are separated by well sidewalls.

2. The display of claim 1 wherein the first subpixel emits a blue color light;

wherein the second subpixel emits a red color light; and

,

wherein the third subpixel emits a green color light.

3. The display of claim 1 wherein the uLEDs are gallium nitride (GaN) LEDs.

4. The display of claim 1 wherein the uLEDs are configured with an electrical connection interface selected from the group consisting of vertical structure contacts and surface mount top surface contacts.

5. The display of claim 1 wherein each uLED includes a post.

6. The display of claim 1 wherein the LED control matrix is configured as an active matrix (AM) of control circuits, each control circuit electrically connected to a corresponding LED.

7. The display substrate of claim 1 further comprising:

a light blocking material overlying the well sidewalls.

8. The display of claim 7 wherein the light blocking material is selected from the group consisting of a light absorbing material and a light reflector material.

9. The display of claim 1

wherein each uLED well comprises a bottom surface, sidewalls, a first electrical interface formed on the uLED well bottom surface and connected to the LED control matrix, and a second electrical interface formed on the uLED well bottom surface connected to a reference voltage;

wherein the uLEDs are surface mount uLEDs, each surface mount uLED comprising;

a top surface overlying a corresponding uLED well bottom surface;

a bottom surface;

a first electrical contact formed on the uLED top surface and connected to a corresponding uLED well first electrical interface; and

,

a second electrical contact formed on the uLED top surface and connected to a corresponding uLED well second electrical interface.

10. The display of claim 9

wherein each OLED well comprises a bottom surface, sidewalls, and a first electrode formed on the OLED well bottom surface and connected to the LED control matrix;

and,

wherein each OLED comprises an OLED heterostructure, the first electrode from a corresponding OLED well, and a second electrode connected to the electrical interface matrix layer.

11. The display of claim 9 wherein the first electrical contact of each surface mount uLED is configured as a ring with a first diameter;

wherein the second electrical contact of each surface mount uLED is formed within a first electrical contact ring perimeter;

wherein each uLED well first electrical interface is configured as a partial ring with the first diameter, and having a mouth opening; and

,

wherein each uLED well second electrical interface is configured as a trace extending into the mouth of a corresponding first electrical interface partial ring.

12. The display of claim 9 wherein each surface mount uLED top surface is bi-planar with a first level and a second level;

wherein each surface mount uLED first electrical contact is formed on the first level of the top surface;

wherein each surface mount uLED second electrical contact is formed on the second level of the top surface;

wherein each uLED well bottom surface is bi-planar with a first level and a second level;

wherein each uLED well first electrical interface is formed on the uLED well bottom first level; and

,

wherein each uLED well second electrical interface is formed on the uLED well bottom second level.

13. The display of claim 1

wherein each OLED well comprises a bottom surface, sidewalls, and a first electrode formed on the OLED well bottom surface and connected to the LED control matrix;

wherein each OLED comprises an OLED heterostructure, the first electrode from a corresponding OLED well, and a second electrode connected to the electrical interface matrix layer;

wherein each uLED well comprises a bottom surface, sidewalls, and a first electrical interface formed on the uLED well bottom surface and connected to the LED control matrix;

wherein the uLEDs are vertical structure uLEDs, each vertical structure uLED comprising;

a bottom surface overlying a corresponding uLED well bottom surface;

a top surface;

a first electrical contact formed on the uLED bottom surface and connected to a corresponding uLED well first electrical interface; and

,

a second electrical contact formed on the uLED top surface and connected to the electrical interface matrix layer.

14. A hybrid light emitting diode (LED) emissive display comprising:

a substrate;

a stack of thin-films overlying a top surface of the substrate;

a plurality of wells formed in a top surface of the stack;

a light blocking material overlying the well sidewalls;

a plurality of pixels formed in the stack, each pixel comprising;

a first subpixel enabled using an inorganic micro LED (uLED);

a second subpixel enabled using an organic LED (OLED),

a third subpixel enabled using an OLED;

an LED control matrix configured to selectively enable the LEDs;

an electrical interface matrix layer overlying the stack, connected to each OLED; and

,

wherein the wells are populated by the LEDs.

15. The display of claim 14 wherein the light blocking material is selected from the group consisting of a light absorbing material and a light reflector material.

16. The display of claim 14 wherein the uLEDs are configured with an electrical connection interface selected from the group consisting of vertical structure contacts and surface mount top surface contacts.

17. The display of claim 14 wherein the first subpixel emits a blue color light;

wherein the second subpixel emits a red color light; and

,

wherein the third subpixel emits a green color light.

18. A hybrid light emitting diode (LED) emissive display comprising:

a substrate;

a stack of thin-films overlying a top surface of the substrate;

a plurality of inorganic micro LED (uLED) wells formed in a top surface of the stack, each uLED well comprising a bottom surface, sidewalls, a first electrical interface formed on the uLED bottom surface and connected to the LED control matrix, and a second electrical interface formed on the uLED well bottom surface connected to a reference voltage;

a plurality of pixels formed in the stack, each pixel comprising;

a first subpixel enabled using a uLED;

a second subpixel enabled using an organic LED (OLED);

a third subpixel enabled using an OLED;

an LED control matrix configured to selectively enable the LEDs; and

,

an electrical interface matrix layer overlying the stack, connected to each OLED;

wherein the uLEDs are surface mount uLEDs, each surface mount uLED comprising;

a top surface overlying a corresponding uLED well bottom surface;

a bottom surface;

a first electrical contact formed on the uLED top surface and connected to a corresponding uLED well first electrical interface; and

,

a second electrical contact formed on the uLED top surface and connected to a corresponding uLED well second electrical interface.

19. The display of claim 18 further comprising:

a plurality of OLED wells formed in the stack, each OLED well comprising a bottom surface, sidewalls, and a first electrode formed on the OLED well bottom surface and connected to the LED control matrix; and

,

wherein each OLED comprises an OLED heterostructure, the first electrode from a corresponding OLED well, and a second electrode connected to the electrical interface matrix layer.

20. The display of claim 18 wherein the first electrical contact of each surface mount uLED is configured as a ring with a first diameter;

wherein the second electrical contact of each surface mount uLED is formed within a first electrical contact ring perimeter;

wherein each uLED well first electrical interface is configured as a partial ring with the first diameter, and having a mouth opening; and

,

wherein each uLED well second electrical interface is configured as a trace extending into the mouth of a corresponding first electrical interface partial ring.

21. The display of claim 18 wherein each surface mount uLED top surface is bi-planar with a first level and a second level;

wherein each surface mount uLED first electrical contact is formed on the first level of the top surface;

wherein each surface mount uLED second electrical contact is formed on the second level of the top surface;

wherein each uLED well bottom surface is bi-planar with a first level and a second level;

wherein each uLED well first electrical interface is formed on the uLED well bottom first level; and

,

wherein each uLED well second electrical interface is formed on the uLED well bottom second level.

22. The display of claim 18 wherein the first subpixel emits a blue color light;

wherein the second subpixel emits a red color light; and

,

wherein the third subpixel emits a green color light.

23. The display of claim 18 wherein the uLEDs are gallium nitride (GaN) LEDs.

24. The display of claim 18 wherein each uLED includes a post.

25. The display of claim 18 wherein the LED control matrix is configured as an active matrix (AM) of control circuits, each control circuit electrically connected to a corresponding LED.

26. A hybrid light emitting diode (LED) emissive display comprising:

a substrate;

a stack of thin-films overlying a top surface of the substrate;

a plurality of organic LED (OLED) wells formed in the stack, each OLED well comprising a bottom surface, sidewalls, and a first electrode formed on the OLED well bottom surface and connected to the LED control matrix;

a plurality of inorganic micro LED (uLED) wells formed in the stack, each uLED well comprising a bottom surface, sidewalls, and a first electrical interface formed on the uLED well bottom surface and connected to the LED control matrix;

a plurality of pixels formed in the stack, each pixel comprising;

a first subpixel enabled using a uLED;

a second subpixel enabled using an OLED;

a third subpixel enabled using an OLED;

an LED control matrix configured to selectively enable the LEDs;

an electrical interface matrix layer overlying the stack, connected to each OLED;

wherein each OLED comprises an OLED heterostructure, the first electrode from a corresponding OLED well, and a second electrode connected to the electrical interface matrix layer;

wherein the uLEDs are vertical structure uLEDs, each vertical structure uLED comprising;

a bottom surface overlying a corresponding uLED well bottom surface;

a top surface;

a first electrical contact formed on the uLED bottom surface and connected to a corresponding uLED well first electrical interface; and

,

a second electrical contact formed on the uLED top surface and connected to the electrical interface matrix layer.

27. The display of claim 26 wherein the first subpixel emits a blue color light;

wherein the second subpixel emits a red color light; and

,

wherein the third subpixel emits a green color light.

28. The display of claim 26 wherein the uLEDs are gallium nitride (GaN) LEDs.

29. The display of claim 26 wherein each uLED includes a post.

30. The display of claim 26 wherein the LED control matrix is configured as an active matrix (AM) of control circuits, each control circuit electrically connected to a corresponding LED.