Phase shift and attenuation circuits for use with multiple-path amplifiers

• US 10,432,148 B2
• Filed: 02/12/2019
• Issued: 10/01/2019
• Est. Priority Date: 01/27/2012
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Inventors: Ahmed, Abdulrhman M. S., Bokatius, Mario M., Hart, Paul R., Staudinger, Joseph, Sweeney, Richard E.
• Primary Examiner(s): Donovan, Lincoln D
• Assistant Examiner(s): Almo, Khareem E
• Application Number:
  US16/274,016
• Publication Number:
  US 20190181805A1
• Time in Patent Office: 231 Days
• Field of Search: None
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G06G 7/10 Power supply arrangements
• CPC Class Codes: H03F 1/0288 using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
• CPC Class Codes: H03F 1/3282 Acting on the phase and the amplitude of the input signal
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/438 Separate feedback of amplitude and phase signals being present
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/21106 An input signal being distributed in parallel over the inputs of a plurality of power amplifiers
• CPC Class Codes: H03F 2203/21193 the supply voltage of a power amplifier being continuously controlled, e.g. by an active potentiometer
• CPC Class Codes: H03F 3/189 High-frequency amplifiers, e.g. radio frequency amplifiers
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/602 Combinations of several amplifiers
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602
• CPC Class Codes: H03G 1/0088 using discontinuously variable devices, e.g. switch-operated
• CPC Class Codes: H03G 2201/106 being attenuating element
• CPC Class Codes: H04L 27/22 Demodulator circuits; Receiver circuits
• CPC Class Codes: H04L 7/0079 Receiver details

Abstract

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

Claims

1. An adjustable power splitter circuit comprising:

a radio frequency (RF) input;

first and second power outputs;

a divider circuit configured to power divide a first RF signal received at the RF input into second and third RF signals, wherein the divider circuit is further configured to produce the second and third RF signals with a predetermined phase shift between the second and third RF signals;

a first signal adjustment circuit coupled to the divider circuit to receive the second RF signal, wherein the first signal adjustment circuit comprises a first adjustable phase shifter circuit and a first attenuator circuit coupled in series, wherein the first attenuator circuit is a first variable attenuator circuit, wherein the first signal adjustment circuit receives the second RF signal from the divider circuit, the first adjustable phase shifter circuit applies a first phase shift to the second RF signal, and the first attenuator circuit applies a first attenuation to the second RF signal to produce a fourth RF signal at the first power output;

a second signal adjustment circuit coupled to the divider circuit to receive the third RF signal, wherein the second signal adjustment circuit is coupled to the divider circuit in parallel with the first signal adjustment circuit, wherein the second signal adjustment circuit comprises a second adjustable phase shifter circuit and a second attenuator circuit coupled in series, wherein the second signal adjustment circuit receives the third RF signal from the divider circuit, the second adjustable phase shifter circuit applies a second phase shift to the third RF signal, and the second attenuator circuit applies a second attenuation to the third RF signal to produce a fifth RF signal at the second power output; and

a serial data interface, wherein the adjustable power splitter circuit is configured to receive data indicating the first phase shift, the second phase shift, and the first attenuation through the serial data interface, and the adjustable power splitter circuit is further configured to control, based on the data, application of the first phase shift by the first signal adjustment circuit, application of the second phase shift by the second signal adjustment circuit, and application of the first attenuation by the first signal adjustment circuit.

2. The circuit of claim 1, wherein:

the first adjustable phase shifter circuit and the first attenuator circuit are separate circuits; and

the second adjustable phase shifter circuit and the second attenuator circuit are separate circuits.

3. The circuit of claim 1, wherein the first variable attenuator circuit provides a range of attenuation in 0.5 decibel (dB) steps.

4. The circuit of claim 1, wherein:

the second attenuator circuit is a second variable attenuator circuit; and

the data interface is configured to receive second data indicating the second attenuation, and the adjustable power splitter circuit is further configured to control, based on the second data, application of the second attenuation by the second variable attenuator circuit.

5. The circuit of claim 4, wherein the first and second attenuator circuits have same attenuation states, cover a same attenuation range, and have same attenuation steps sizes.

6. The circuit of claim 4, wherein the first and second attenuator circuits have different attenuation states, cover different attenuation ranges, and have different attenuation steps sizes.

7. The circuit of claim 1, wherein the predetermined phase shift is a ninety degree phase shift.

8. The circuit of claim 1, wherein the serial data interface includes a data in line and a clock signal line.

9. The circuit of claim 1, wherein the first adjustable phase shifter circuit comprises a plurality of switchable, serially coupled phase shifting elements.

10. The circuit of claim 1, wherein the first variable attenuator circuit comprises a resistive divider.

11. The circuit of claim 1, wherein the serial data interface is selected from a serial interface and a serial peripheral interface.

12. The circuit of claim 1, wherein the data includes a multiple-bit value that uniquely specifies one of multiple phase shifted states for the first adjustable phase shifter circuit, one of multiple phase shifted states for the second adjustable phase shifter circuit, and one of multiple attenuation states for the first variable attenuator circuit.

13. A Doherty power amplifier comprising:

a radio frequency (RF) input;

first and second parallel amplifier paths selected from a main amplifier path and a peaking amplifier path;

a divider circuit configured to power divide a first RF signal received at the RF input into second and third RF signals for the main and peaking amplifier paths, wherein the divider circuit is further configured to produce the second and third RF signals with a ninety degree phase shift between the second and third RF signals;

a first signal adjustment circuit coupled to the divider circuit to receive the second RF signal, wherein the first signal adjustment circuit comprises a first adjustable phase shifter circuit and a first attenuator circuit coupled in series, wherein the first attenuator circuit is a first variable attenuator circuit, wherein the first signal adjustment circuit receives the second RF signal from the divider circuit, the first adjustable phase shifter circuit applies a first phase shift to the second RF signal, and the first attenuator circuit applies a first attenuation to the second RF signal to produce a fourth RF signal at a first power output;

a second signal adjustment circuit coupled to the divider circuit to receive the third RF signal, wherein the second signal adjustment circuit is coupled to the divider circuit in parallel with the first signal adjustment circuit, wherein the second signal adjustment circuit comprises a second adjustable phase shifter circuit and a second attenuator circuit coupled in series, wherein the second signal adjustment circuit receives the third RF signal from the divider circuit, the second adjustable phase shifter circuit applies a second phase shift to the third RF signal, and the second attenuator circuit applies a second attenuation to the third RF signal to produce a fifth RF signal at a second power output; and

a data interface, wherein the Doherty power amplifier is configured to receive data indicating the first phase shift, the second phase shift, and the first attenuation through the data interface, and the Doherty power amplifier is further configured to control, based on the data, application of the first phase shift by the first signal adjustment circuit, application of the second phase shift by the second signal adjustment circuit, and application of the first attenuation by the first signal adjustment circuit.

14. The amplifier of claim 13, wherein:

the first adjustable phase shifter circuit and the first attenuator circuit are separate circuits; and

the second adjustable phase shifter circuit and the second attenuator circuit are separate circuits.

15. The amplifier of claim 13, wherein:

the second attenuator circuit is a second variable attenuator circuit; and

the data interface is configured to receive data indicating the second attenuation, and the adjustable power splitter circuit is further configured to control, based on the second data, application of the second attenuation by the second variable attenuator circuit.

16. The amplifier of claim 13, wherein the data includes a multiple-bit value that uniquely specifies one of multiple phase shifted states for the first adjustable phase shifter circuit, one of multiple phase shifted states for the second adjustable phase shifter circuit, and one of multiple attenuation states for the first variable attenuator circuit.

17. The amplifier of claim 13, further comprising:

a first amplifier coupled to the first power output of the first signal adjustment circuit, wherein the first amplifier is configured to receive and amplify the fourth RF signal to produce a sixth RF signal;

a second amplifier coupled to the second power output of the second signal adjustment circuit, wherein the second amplifier is configured to receive and amplify the fourth RF signal to produce a seventh RF signal; and

a combiner coupled to the first and second amplifiers and configured to receive and combine the sixth and seventh RF signals to produce an eighth RF signal.

18. The amplifier of claim 13, wherein the data interface is selected from a serial interface and a serial peripheral interface.

19. The amplifier of claim 13, wherein:

the first signal adjustment circuit is coupled between the divider circuit and the main amplifier path; and

the second signal adjustment circuit is coupled between the divider circuit and the peaking amplifier path.

20. The amplifier of claim 13, wherein:

the first signal adjustment circuit is coupled between the divider circuit and the peaking amplifier path; and

the second signal adjustment circuit is coupled between the divider circuit and the main amplifier path.