Semiconductor devices, a fluid sensor and a method for forming a semiconductor device

• US 10,461,203 B2
• Filed: 03/20/2018
• Issued: 10/29/2019
• Est. Priority Date: 05/28/2015
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Clara, Stefan, Grille, Thomas, Hedenig, Ursula, Irsigler, Peter, Jakoby, Bernhard, Lavchiev, Ventsislav M., Ostermann, Thomas, Popp, Thomas
• Primary Examiner(s): Bryant, Michael C
• Application Number:
  US15/925,904
• Publication Number:
  US 20180212085A1
• Time in Patent Office: 588 Days
• CPC Class Codes: H01L 2933/0033 relating to semiconductor body packages
• CPC Class Codes: H01L 31/035209 comprising a quantum structures
• CPC Class Codes: H01L 31/035218 the quantum structure being quantum dots
• CPC Class Codes: H01L 31/035254 including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table, e.g. Si-SiGe superlattices
• CPC Class Codes: H01L 31/173 formed in, or on, a common substrate
• CPC Class Codes: H01L 31/1812 including only AIVBIV alloys, e.g. SiGe
• CPC Class Codes: H01L 31/1864 Annealing
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier

Abstract

A semiconductor device comprises a plurality of quantum structures comprising predominantly germanium. The plurality of quantum structures are formed on a first semiconductor layer structure. The quantum structures of the plurality of quantum structures have a lateral dimension of less than 15 nm and an area density of at least 8×10¹¹ quantum structures per cm². The plurality of quantum structures are configured to emit light with a light emission maximum at a wavelength of between 2 μm and 10 μm or to absorb light with a light absorption maximum at a wavelength of between 2 μm and 10 μm.

Claims

1. A semiconductor device, comprising:

a quantum well layer stack comprising a plurality of first quantum well layers and a plurality of second quantum well layers, wherein first quantum well layers of the plurality of first quantum well layers and second quantum well layers of the plurality of second quantum well layers are arranged alternatingly on a first semiconductor layer structure,

wherein the first quantum well layers of the plurality of first quantum well layers comprise silicon-germanium and the second quantum well layers of the plurality of second quantum well layers comprise silicon,

wherein the first quantum well layers of the plurality of first quantum well layers and the second quantum well layers of the plurality of second quantum well layers have a thickness of below 100 nm, and

wherein the quantum well layer stack is configured to emit light with a light emission maximum at a wavelength of between 2 μ

m and 10 μ

m or to absorb light with a light absorption maximum at a wavelength of between 2 μ

m and 10 μ

m.

2. The semiconductor device according to claim 1, wherein the first quantum well layers comprises silicon_x-germanium_1-x, wherein x lies between 0.25 and 0.35.

3. The semiconductor device according to claim 1, comprising:

a first electrical contact structure in electrical contact with a first semiconductor layer structure; and

a second electrical contact structure in electrical contact with a second semiconductor layer structure, wherein the plurality of first quantum well layers and the plurality of second quantum well layers are arranged between the first semiconductor layer structure and the second semiconductor layer structure,

wherein the quantum well layer stack is configured to emit light with a light emission maximum at a wavelength of between 5 μ

m and 7 μ

m or to absorb light with a light absorption maximum at a wavelength of between 5 μ

m and 7 μ

m based on a voltage applied to the first electrical contact structure and the second electrical contact structure, wherein the applied voltage lies between 1 V and 10 V.

4. The semiconductor device according to claim 1, wherein the first quantum well layers of the plurality of first quantum well layers have a thickness between 1 nm and 10 nm.

5. The semiconductor device according to claim 1, wherein the second quantum well layers of the plurality of second quantum well layers have a thickness between 1 nm and 10 nm.

6. The semiconductor device according to claim 1, wherein a second quantum well layer, of the plurality of second quantum well layers, is arranged between consecutive first quantum well layers, of the plurality of first quantum well layers, and

a first quantum well layer, of the plurality of first quantum well layers, is arranged between consecutive second quantum well layers, of the plurality of second quantum well layers.

7. The semiconductor device according to claim 1, further comprising:

a second semiconductor layer structure covering the quantum well layer stack.

8. The semiconductor device according to claim 1, wherein the quantum well layer stack is configured to emit light with the light emission maximum at a wavelength of between 5 μ

m and 7 μ

m.

9. The semiconductor device according to claim 1, wherein the quantum well layer stack is configured to absorb light with the light absorption maximum at a wavelength of between 5 μ

m and 7 μ

m.