Dynamically updating hardware prefetch trait to exclusive or shared at program detection

• US 10,514,920 B2
• Filed: 02/18/2015
• Issued: 12/24/2019
• Est. Priority Date: 10/20/2014
• Status: Active Grant

• Current Assignee: VIA Technologies Incorporated (VIA Technologies)
• Original Assignee: VIA Technologies Incorporated (VIA Technologies)
• Inventors: Hooker, Rodney E., Loper, Albert J., Greer, John Michael
• Primary Examiner(s): Li, Aimee
• Assistant Examiner(s): Doman, Shawn
• Application Number:
  US14/625,124
• Publication Number:
  US 20160110194A1
• Time in Patent Office: 1,770 Days
• Field of Search: 712207
• CPC Class Codes: G06F 12/0831 using a bus scheme, e.g. with bus monitoring or watching means
• CPC Class Codes: G06F 12/084 with a shared cache
• CPC Class Codes: G06F 12/0842 for multiprocessing or multitasking
• CPC Class Codes: G06F 12/0862 with prefetch
• CPC Class Codes: G06F 2212/1016 Performance improvement
• CPC Class Codes: G06F 2212/452 Instruction code
• CPC Class Codes: G06F 2212/6022 Using a prefetch buffer or dedicated prefetch cache
• CPC Class Codes: G06F 2212/6024 History based prefetching
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0629 Configuration or reconfiguration of storage systems
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 9/30047 Prefetch instructions; cache control instructions
• CPC Class Codes: G06F 9/30109 having multiple operands in a single register
• CPC Class Codes: G06F 9/3802 Instruction prefetching

Abstract

A processor includes a processing core that detects a predetermined program is running on the processor and looks up a prefetch trait associated with the predetermined program running on the processor, wherein the prefetch trait is either exclusive or shared. The processor also includes a hardware data prefetcher that performs hardware prefetches for the predetermined program using the prefetch trait. Alternatively, the processing core loads each of one or more range registers of the processor with a respective address range in response to detecting that the predetermined program is running on the processor. Each of the one or more address ranges has an associated prefetch trait, wherein the prefetch trait is either exclusive or shared. The hardware data prefetcher performs hardware prefetches for the predetermined program using the prefetch traits associated with the address ranges loaded into the range registers.

Claims

1. A processor, comprising:

a processing core configured to;

load a first table that specifies a prefetch trait for a predetermined program, wherein the prefetch trait is a characteristic of a prefetch that is represented in a binary value, wherein the characteristic is either exclusive or shared;

detect from a second table that identifies running processes that the predetermined program is running on the processor; and

look up the prefetch trait associated with the predetermined program running on the processor; and

a hardware data prefetcher configured to perform hardware prefetches for the predetermined program using the prefetch trait, wherein the hardware data prefetcher performs hardware prefetches for all values of the prefetch trait;

wherein the hardware data prefetcher analyzes memory access by the processing core, that are contemporaneous with the hardware prefetches, and dynamically updates the prefetch trait according to the analysis.

2. The processor of claim 1, wherein the prefetch trait is determined prior to detecting that the predetermined program is running on the processor.

3. The processor of claim 2, wherein the prefetch trait is determined prior to detecting that the predetermined program is running on the processor by:

determining first performance when running the predetermined program while the processor is configured to perform hardware prefetches using a shared prefetch trait;

determining second performance when running the predetermined program while the processor is configured to perform hardware prefetches using an exclusive prefetch trait; and

selecting the prefetch trait as shared if the first performance is better than the second performance and selecting the prefetch trait as exclusive if the second performance is better than the first performance.

4. The processor of claim 1, wherein to detect that the predetermined program is running on the processor, an operating system running on the processor detects the presence of an identifier of the predetermined program in a running process table of the operating system.

5. The processor of claim 4, wherein the processor is configured to receive the prefetch trait from the operating system.

6. The processor of claim 1, wherein the processor is also configured to:

receive information that specifies at least one identifying characteristic and an associated prefetch trait for the predetermined program, prior to detecting that the predetermined program is running on the processor;

wherein to detect that the predetermined program is running on the processor, the processor matches the at least one identifying characteristic of the predetermined program from the received information with an identifying characteristic determined as the predetermined program runs; and

wherein to perform hardware prefetches for the predetermined program using the prefetch trait, the hardware data prefetcher performs hardware prefetches for the predetermined program using the prefetch trait associated with the matched at least one identifying characteristic from the received information.

21. The processor of claim 1, wherein the first table is included in a device driver.

7. A method for performing hardware data prefetching by a processor, the method comprising:

loading a first table that specifies a prefetch trait for a predetermined program, wherein the prefetch trait is a characteristic of a prefetch that is represented in a binary value, wherein the characteristic is either exclusive or shared;

detecting from a second table that identifies running processes that the predetermined program is running on the processor;

looking up the prefetch trait associated with the predetermined program running on the processor;

performing hardware prefetches for the predetermined program using the prefetch trait, wherein the hardware prefetches are performed for all values of the prefetch trait; and

analyzing memory access that are contemporaneous with the hardware prefetches, and dynamically updating the prefetch trait according to the analysis.

8. The method of claim 7, wherein the prefetch trait is determined prior to said detecting that the predetermined program is running on the processor.

9. The method of claim 8, wherein the prefetch trait is determined prior to said detecting that the predetermined program is running on the processor by:

determining first performance when running the program while the processor is configured to perform hardware prefetches using a shared prefetch trait;

determining second performance when running the program while the processor is configured to perform hardware prefetches using an exclusive prefetch trait; and

selecting the prefetch trait as shared if the first performance is better than the second performance and selecting the prefetch trait as exclusive if the second performance is better than the first performance.

10. The method of claim 7, wherein said detecting that the predetermined program is running on the processor comprises detecting, by an operating system running on the processor, the presence of an identifier of the predetermined program in a running process table of the operating system.

11. The method of claim 10, further comprising:

providing, by the operating system, the prefetch trait to the processor in response to said detecting that the predetermined program is running on the processor.

12. The method of claim 7, the method further comprising:

receiving, by the processor, information that specifies at least one identifying characteristic and an associated prefetch trait for the predetermined program, prior to said detecting that the predetermined program is running on the processor;

wherein said detecting that the predetermined program is running on the processor comprises matching the at least one identifying characteristic of the predetermined program from the received information with an identifying characteristic determined as the predetermined program runs; and

wherein said performing hardware prefetches for the predetermined program using the prefetch trait comprises performing hardware prefetches for the predetermined program using the prefetch trait associated with the matched at least one identifying characteristic from the received information.

13. A processor, comprising:

a processing core configured to;

detect that a predetermined program is running on the processor; and

load each of one or more range registers of the processor with a respective address range in response to said detecting that the predetermined program is running on the processor, wherein each of the one or more address ranges has an associated prefetch trait, wherein the prefetch trait is a characteristic of a prefetch that is represented in a binary value, wherein the characteristic is either exclusive or shared; and

a hardware data prefetcher configured to perform hardware prefetches for the predetermined program using the prefetch trait associated with the one or more address ranges loaded into the range registers, wherein the hardware data prefetcher performs hardware prefetches for all values of the prefetch trait;

wherein the hardware data prefetcher analyzes memory accesses by the processing core, that are contemporaneous with the hardware prefetches, and dynamically updates the prefetch trait according to the analysis.

14. The processor of claim 13, wherein to perform the hardware prefetches for the predetermined program using the prefetch trait associated with the one or more address ranges loaded into the range registers, the hardware data prefetcher is configured to:

predict an address of data that will be needed in the future by the program;

determine whether the address is within one of the one or more address ranges;

when the address is within one of the one or more address ranges, use the prefetch trait associated with the one of the address ranges to perform a hardware prefetch of the data at the address; and

when the address is not within one of the one ore more address ranges, use a default prefetch trait to perform the hardware prefetch of the data at the address.

15. The processor of claim 14, wherein the prefetch trait associated with the one of the one or more address ranges is implied as the opposite of the default prefetch trait.

16. The processor of claim 13, wherein the prefetch trait associated with the one of the one or more address ranges is held in the range register that holds the one of the one or more address ranges.

17. A method for performing hardware data prefetching by a processor, the method comprising:

detecting that a predetermined program is running on the processor;

loading each of one or more range registers of the processor with a respective address range in response to said detecting that the predetermined program is running on the processor;

wherein each of the one or more address ranges has an associated prefetch trait;

wherein the prefetch trait is a characteristic of a prefetch that is represented in a binary value, wherein the characteristic is either exclusive or shared; and

performing hardware prefetches for the predetermined program using the prefetch trait associated with the address ranges loaded into the range registers.

18. The method of claim 17, wherein said performing hardware prefetches for the predetermined program using the prefetch trait associated with the one or more address ranges loaded into the range registers comprises:

predicting an address of data that will be needed in the future by the program;

determining whether the address is within one of the one or more address ranges;

when the address is within one of the address ranges, using the prefetch trait associated with the one of the one or more address ranges to perform a hardware prefetch of the data at the address; and

when the address is not within one of the one or more address ranges, using a default prefetch trait to perform the hardware prefetch of the data at the address.

19. The method of claim 18, wherein the prefetch trait associated with the one of the one or more address ranges is implied as the opposite of the default prefetch trait.

20. The method of claim 17, wherein the prefetch trait associated with the one of the one or more address ranges is held in the range register that holds the one of the one or more address ranges.