Demodulation of on-off-key modulated signals in signal isolator systems

• US 10,536,309 B2
• Filed: 10/14/2015
• Issued: 01/14/2020
• Est. Priority Date: 09/15/2014
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Yun, Ruida, Gaalaas, Eric C., Chen, Baoxing
• Primary Examiner(s): Tadese, Berhanu
• Application Number:
  US14/883,342
• Publication Number:
  US 20160080183A1
• Time in Patent Office: 1,553 Days
• CPC Class Codes: H03K 3/023 by the use of differential amplifiers or comparators, with internal or external positive feedback
• CPC Class Codes: H03K 5/2481 with at least one differential stage
• CPC Class Codes: H04L 27/06 Demodulator circuits; Receiver circuits

Abstract

A receiver system for an on-off key (“OOK”) isolator system may include a pair of receivers. A first receiver may generate a first current signal representing a received OOK signal, and a second receiver may generate a second current signal from a common mode representation of the received OOK signal. The receiver system may include circuitry to compare the first and second current signals and generate an output signal therefrom.

Claims

1. An on-off key (“

OOK”

) receiver system, comprising;

a first receiver that generates a first current signal representing a received OOK signal;

a second receiver that generates a second current signal based on a common mode representation of the received OOK signal,

wherein the second current signal has a magnitude that is larger than a magnitude of the first current signal when the received OOK signal is inactive; and

a current comparator to generate an output signal representing a comparison of the first and second current signals.

2. The system of claim 1, wherein the first and second receivers each comprise a respective differential pair circuit, wherein transistors of the second differential pair circuit are larger than respective transistors of the first differential pair circuit.

3. The system of claim 1, wherein:

the current comparator comprises a network of current mirrors, a first current mirror connected to the first receiver, a second current mirror connected to the second receiver;

the network has a pair of outputs coupled to a common node for the first and second current signals.

4. The system of claim 1, wherein the comparator comprises an output system to generate a binary output voltage.

5. The system of claim 4, wherein the output system includes at least one inverter on a signal path between the current comparison and the output signal.

6. The system of claim 4, wherein the output system comprises a plurality of serially-connected inverters.

7. The system of claim 4, wherein the output system includes at least a Schmitt trigger on a signal path between the current comparison and the output signal.

8. The system of claim 4, wherein the output system comprises a current-limited inverter.

9. The system of claim 4, wherein the output system comprises:

an inverter; and

a filter coupled to the inverter'"'"'s output.

10. The system of claim 1, wherein the first receiver is a differential receiver having differential inputs configured to receive the OOK signal.

11. An on-off key (“

OOK”

) receiver system, comprising;

a first receiver that generates a first current signal representing a received OOK signal;

a second receiver that generates a second current signal based on a common mode representation of the received OOK signal;

a current comparator to generate an output signal representing a comparison of the first and second current signals;

a voltage divider connected across differential inputs to the first receiver;

a pair of current routers, each coupled to a common current source, a first current router of the pair of current routers having inputs coupled to the differential inputs to the first receiver, and a second current router of the pair of current routers forming part of the second receiver and having at least one input coupled to an intermediate node of the voltage divider, wherein transistors of the second current router are larger than transistors of the first current router wherein;

the current comparator has inputs coupled to the first and second current routers and a node for comparison of currents from each of the first and second current routers; and

an output circuit having an input coupled to the node and an output for outputting a binary representation of the output signal.

12. The system of claim 11, wherein the first and second current routers each comprise a differential pair of transistors.

13. The system of claim 11, wherein the output circuit includes at least one inverter on a signal path between the current comparator and the output of the output circuit.

14. The system of claim 11, wherein the output circuit comprises a plurality of serially-connected inverters.

15. The system of claim 11, wherein the output circuit includes at least a Schmitt trigger on a signal path between the current comparator and the output of the output circuit.

16. The system of claim 11, wherein the output circuit comprises a current-limited inverter.

17. The system of claim 11, wherein the output circuit comprises:

an inverter; and

a filter coupled to an output of the inverter.

18. A method of generating a digital voltage signal representing a differential on-off keyed input signal, comprising:

generating, by an isolator device, a first current signal representing activity of a differential OOK signal receiver;

generating a second current signal based on a common mode level of the differential OOK signal,

wherein the second current signal has a magnitude that is larger than a magnitude of the first current signal when the differential OOK signal is inactive;

comparing the first and second current signals; and

generating a binary voltage signal from the current comparison.

19. The method of claim 18, wherein the comparing comprises routing representations of the first and second current signals to a common node at different orientations to each other.