Pixel circuit, display panel, and driving method
First Claim
1. A pixel circuit, comprising:
- a driving sub-circuit including a first electrode electrically coupled to a high voltage input terminal and a second electrode configured to output a driving current;
a compensation sub-circuit including;
a first terminal electrically coupled to the second electrode of the driving sub-circuit;
a second terminal electrically coupled to a gate electrode of the driving sub-circuit;
a third terminal;
a fourth terminal electrically coupled to a fixed voltage terminal; and
a control terminal,the compensation sub-circuit being configured to;
store a threshold voltage of the driving sub-circuit, andin response to a compensation control signal received at the control terminal, electrically link the fourth terminal of the compensation sub-circuit to the third terminal of the compensation sub-circuit and electrically link the first terminal of the compensation sub-circuit to the second terminal of the compensation sub-circuit;
a data writing sub-circuit including a first terminal, a second terminal, and a control terminal, the data writing sub-circuit being configured to;
in response to a data writing control signal received at the control terminal of the data writing sub-circuit, electrically link the first terminal of the data writing sub-circuit to the second terminal of the data writing sub-circuit;
a data voltage storage sub-circuit configured to store a data voltage inputted through the data writing sub-circuit, the data voltage storage sub-circuit including;
a first terminal electrically coupled to the third terminal of the compensation sub-circuit and the second terminal of the data writing sub-circuit; and
a second terminal electrically coupled to the high voltage input terminal; and
an initialization sub-circuit including a first terminal electrically coupled to the fixed voltage terminal, a second terminal electrically coupled to the third terminal of the compensation sub-circuit, a third terminal electrically coupled to the second terminal of the compensation sub-circuit, a fourth terminal electrically coupled to a reference voltage input terminal, and a control terminal,wherein the initialization sub-circuit is configured to, in response to an initialization control signal received at the control terminal of the initialization sub-circuit, electrically link the second terminal of the initialization sub-circuit to the first terminal of the initialization sub-circuit and electrically link the third terminal of the initialization sub-circuit to the fourth terminal of the initialization sub-circuit.
1 Assignment
0 Petitions
Accused Products
Abstract
A pixel circuit includes a driving sub-circuit, a compensation sub-circuit, a data writing sub-circuit, and a data voltage storage sub-circuit. The driving sub-circuit includes a first electrode electrically coupled to a high voltage input terminal and a second electrode configured to output a driving current. The compensation sub-circuit is configured to store a threshold voltage of the driving sub-circuit. The compensation sub-circuit includes a first terminal electrically coupled to the second electrode of the driving sub-circuit, a second terminal electrically coupled to a gate electrode of the driving sub-circuit, a third terminal, and a fourth terminal, and a control terminal. The data writing sub-circuit includes a first terminal and a second terminal. The data voltage storage sub-circuit includes a first terminal electrically coupled to the third terminal of the compensation sub-circuit and the second terminal of the data writing sub-circuit; and a second terminal.
20 Citations
18 Claims
-
1. A pixel circuit, comprising:
-
a driving sub-circuit including a first electrode electrically coupled to a high voltage input terminal and a second electrode configured to output a driving current; a compensation sub-circuit including; a first terminal electrically coupled to the second electrode of the driving sub-circuit; a second terminal electrically coupled to a gate electrode of the driving sub-circuit; a third terminal; a fourth terminal electrically coupled to a fixed voltage terminal; and a control terminal, the compensation sub-circuit being configured to; store a threshold voltage of the driving sub-circuit, and in response to a compensation control signal received at the control terminal, electrically link the fourth terminal of the compensation sub-circuit to the third terminal of the compensation sub-circuit and electrically link the first terminal of the compensation sub-circuit to the second terminal of the compensation sub-circuit; a data writing sub-circuit including a first terminal, a second terminal, and a control terminal, the data writing sub-circuit being configured to; in response to a data writing control signal received at the control terminal of the data writing sub-circuit, electrically link the first terminal of the data writing sub-circuit to the second terminal of the data writing sub-circuit; a data voltage storage sub-circuit configured to store a data voltage inputted through the data writing sub-circuit, the data voltage storage sub-circuit including; a first terminal electrically coupled to the third terminal of the compensation sub-circuit and the second terminal of the data writing sub-circuit; and a second terminal electrically coupled to the high voltage input terminal; and an initialization sub-circuit including a first terminal electrically coupled to the fixed voltage terminal, a second terminal electrically coupled to the third terminal of the compensation sub-circuit, a third terminal electrically coupled to the second terminal of the compensation sub-circuit, a fourth terminal electrically coupled to a reference voltage input terminal, and a control terminal, wherein the initialization sub-circuit is configured to, in response to an initialization control signal received at the control terminal of the initialization sub-circuit, electrically link the second terminal of the initialization sub-circuit to the first terminal of the initialization sub-circuit and electrically link the third terminal of the initialization sub-circuit to the fourth terminal of the initialization sub-circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
-
Specification