Amorphous cathode material for battery device

• US 10,593,985 B2
• Filed: 04/13/2017
• Issued: 03/17/2020
• Est. Priority Date: 10/15/2014
• Status: Active Grant

• Current Assignee: Sakti3, Inc
• Original Assignee: Sakti3, Inc
• Inventors: Sastry, Ann Marie, Wang, Chia-Wei, Chen, Yen-Hung, Kim, HyonCheol, Zhang, Xiangchun, Chung, Myoungdo
• Primary Examiner(s): Chmielecki, Scott J.
• Application Number:
  US15/487,353
• Publication Number:
  US 20170352907A1
• Time in Patent Office: 1,069 Days
• Field of Search: None
• CPC Class Codes: H01M 10/0413 Large-sized flat cells or batteries for motive or stationary systems with plate-like electrodes
• CPC Class Codes: H01M 10/0436 Small-sized flat cells or batteries for portable equipment
• CPC Class Codes: H01M 10/052 Li-accumulators
• CPC Class Codes: H01M 10/0585 of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators
• CPC Class Codes: H01M 2004/021 Physical characteristics, e.g. porosity, surface area
• CPC Class Codes: H01M 2220/10 Batteries in stationary systems, e.g. emergency power source in plant
• CPC Class Codes: H01M 2220/20 Batteries in motive systems, e.g. vehicle, ship, plane
• CPC Class Codes: H01M 2220/30 Batteries in portable systems, e.g. mobile phone, laptop
• CPC Class Codes: H01M 4/0402 Methods of deposition of the material
• CPC Class Codes: H01M 4/483 for non-aqueous cells H01M4/485 takes precedence
• CPC Class Codes: H01M 4/5825 Oxygenated metallic salts or polyanionic structures, e.g. borates, phosphates, silicates, olivines
• CPC Class Codes: H01M 6/40 Printed batteries , e.g. thin film batteries
• CPC Class Codes: Y02E 60/10 Energy storage using batteries
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A method of fabricating a multilayered thin film solid state battery device. The method steps include, but are not limited to, the forming of the following layers: substrate member, a barrier material, a first electrode material, a thickness of cathode material, an electrolyte, an anode material, and a second electrode material. The formation of the barrier material can include forming a polymer material being configured to substantially block a migration of an active metal species to the substrate member, and being characterized by a barrier degrading temperature. The formation of cathode material can include forming a cathode material having an amorphous characteristic, while maintaining a temperature of about −40 Degrees Celsius to no greater than 500 Degrees Celsius such that a spatial volume is characterized by an external border region of the cathode material. The method can then involve transferring the resulting thin film solid state battery device.

Claims

1. A method of fabricating a solid state battery device, the method comprising:

providing a substrate;

forming a polymer containing barrier material on the substrate configured to avoid migration of an active metal species to the substrate, and having a barrier degrading temperature;

forming a layer of first electrode material overlying the substrate;

forming a layer of amorphous cathode material overlying the layer of first electrode, the layer of amorphous cathode material having a thickness ranging from 0.005 μ

m to 1000 μ

m and comprising a plurality of pillar structures, each of the pillar structures having a base region and an upper region, and each pair of pillar structures having a plurality of irregularly-shaped polyhedral structures provided between the pair of pillar structures;

forming an electrolyte layer overlying the layer of amorphous cathode material;

forming a layer of anode material overlying the layer of electrolyte;

forming a layer of second electrode material overlying the layer of anode material; and

providing a thin film solid state battery device characterized by an energy density ranging from 50 Watt-hour/liter to 3000 Watt-hour/liter.

2. The method of claim 1, wherein the layer of amorphous cathode material comprises a first thickness of amorphous material and a second thickness of material, the first thickness being greater than the second thickness, and the first thickness of amorphous material being different in structure than the second thickness of material.

3. The method of claim 1, wherein the layer of amorphous cathode material comprises a plurality of pillar-like structures, each of which extends along a direction of the thickness, and substantially normal to a plane of the thickness of material and the substrate.

4. The method of claim 1, wherein the polymer containing barrier material comprises a thickness ranging from 0.001 μ

m to 1 μ

m to compensate a strain between the layer of first electrode member and the substrate;

wherein the barrier degrading temperature is less than 900 Degrees Celsius.

5. The method of claim 1, wherein the layer of amorphous cathode material comprises a lithium species, the lithium species being selected from at least one of LiSON, Li_xLa_1-xZrO₃, Li_xLa_1-xTiO₃, LiAlGePO₄, LiAlTiPO₄, LiSiCON, Li_1.3Al_0.3Ti_1.7 (PO₄)₃, 0.5LiTaO_3+0.5SrTiO₃, Li_0.34La_0.51TiO_2.94, LiAlCl₄, Li₇SiPO₈, Li₉AlSiO₈, Li₃PO₄, Li₃SP₄, LiPON, Li₇La₃Zr₂O₁₂, Li_1.5Al_0.5Ge_1.5(PO₄)₃, Li₆PS₅Cl, or Li₅Na₃Nb₂O₁₂.

6. The method of claim 1, wherein the layer of amorphous cathode material has a conductivity of from 1.E-6 S/m to 1.E 5 S/m.

7. The method of claim 1, wherein the layer of amorphous cathode material has a C rate ranging from C/100 to 100C.

8. The method of claim 1, wherein the layer of amorphous cathode material has an XRD peak to total ratio ranging from 0% to 50% crystallinity.

9. The method of claim 1, wherein the layer of amorphous cathode material has an average crystal crystallite size ranging from 0.1 to 100 nm configured in a spatial region.

10. The method of claim 1, wherein the layer of amorphous cathode the cathode material comprises a surface morphology.

11. The method of claim 1, wherein the step of forming the layer of amorphous cathode material comprises subjecting a source material to an energy source maintained in a vacuum environment to decompose the source material via evaporation to cause a deposition of a layer of amorphous cathode material.

12. The method of claim 1, wherein the layer of amorphous cathode material comprises a plurality of pillar structures, each of the pillar structure having a base region and an upper region, each of the pillar structures comprising a plurality of smaller particle-like structures, each of the smaller particle like structures being configured within each of the pillar structures.

13. The method of claim 1, wherein the layer of amorphous cathode material comprises a plurality of pillar structures, each of the pillar structures having a base region and an upper region, each of the pillar structures comprising a plurality of particle-like structures, each of the particle like structures being configured within each of the pillar structures.

14. The method of claim 1, wherein the step of forming the layer of amorphous cathode material comprises forming a plurality of first cone structures and a plurality of second cone structures such that the plurality of first cone structures is inter-digitated with the plurality of second cone structures.

15. The method of claim 1, wherein the layer of amorphous cathode material comprises a plurality of discontinuities generally arranged in a direction from a first face of the layer of amorphous cathode material to a second face of the layer of amorphous cathode material.

16. The method of claim 1, wherein the layer of amorphous cathode material comprises a plurality of nanotube structures, each of the nanotube structure having a base region and an upper region, and substantially arranged in a direction normal to an upper surface region and a lower surface region of the layer of amorphous cathode material.

17. A thin film solid state battery device comprising:

a substrate;

an electrode material overlying the substrate;

a cathode material with a diffusivity of 1.E-18 m²/s to 1.E-12 m²/s overlying the electrode material, configured as an amorphous structure having an average particle size ranging from 0.05 μ

m to 100 μ

m;

a solid state electrolyte overlying the cathode material; and

an anode material overlying the solid state electrolyte;

wherein the battery device has an energy density of from 100 Watt-hour/liter to 2000 Watt-hour/liter, and

wherein the cathode material comprises a plurality of pillar structures, each of the pillar structures having a base region and an upper region, and each pair of pillar structures having a plurality of irregularly-shaped polyhedral structures provided between the pair of pillar structures.

18. The device of claim 17, wherein the cathode material comprises a first thickness of amorphous material and a second thickness of material, the first thickness being greater than the second thickness, and the first thickness of amorphous material being different in structure than the second thickness of material.

19. The device of claim 17, wherein each pillar-like structure of the plurality of pillar-like structures extends along a direction of the thickness and substantially normal to a plane of the thickness of material and the substrate.

20. The device of claim 17, comprising a polymer containing barrier material on the substrate configured to avoid migration of an active metal species to the substrate.

21. The device of claim 20, wherein the polymer containing barrier material comprises a thickness ranging from 0.001 μ

m to 1 μ

m to compensate a strain between the layer of first electrode member and the substrate;

wherein the barrier degrading temperature is less than 900 degrees Celsius.

22. The device of claim 17, wherein the cathode material comprises a lithium species, the lithium species being selected from at least one of LiSON, Li_xLa_1-xZrO₃, Li_xLa_1-xTiO₃, LiAlGePO₄, LiAlTiPO₄, LiSiCON, Li_1.3Al_0.3Ti_1.7 (PO₄)₃, 0.5LiTaO_3+0.5SrTiO₃, Li_0.34La_0.51TiO_2.94, LiAlCl₄, Li₇SiPO₈, Li₉AlSiO₈, Li₃PO₄, Li₃SP₄, LiPON, Li₇La₃Zr₂O₁₂, Li_1.5Al_0.5Ge_1.5(PO₄)₃, Li₆PS₅Cl, or Li₅Na₃Nb₂O₁₂.

23. The device of claim 17, wherein the cathode material has a conductivity of from 1.E-6 S/m to 1.E 5 S/m.

24. The device of claim 17, wherein the cathode material has a C rate ranging from C/100 to 100C.

25. The device of claim 17, wherein the cathode material has an XRD peak to total ratio ranging from 0% to 50% crystallinity.

26. The device of claim 17, wherein the cathode material is formed by forming a plurality of first cone structures and a plurality of second cone structures such that the plurality of first cone structures is inter-digitated with the plurality of second cone structures.

27. The device of claim 17, wherein the cathode material comprises a plurality of discontinuities generally arranged in a direction from a first face of the layer of amorphous cathode material to a second face of the layer of amorphous cathode material.

28. The device of claim 17, wherein the cathode material comprises a plurality of nanotube structures, each of the nanotube structure having a base region and an upper region, and substantially arranged in a direction normal to an upper surface region and a lower surface region of the layer of amorphous cathode material.