Imaging device and imaging system performing multiple A/D conversions of a singular pixel signal

• US 10,594,971 B2
• Filed: 05/11/2018
• Issued: 03/17/2020
• Est. Priority Date: 09/10/2015
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Totsuka, Hirofumi, Yoshida, Daisuke
• Primary Examiner(s): Cutler, Albert H
• Application Number:
  US15/977,653
• Publication Number:
  US 20180262706A1
• Time in Patent Office: 676 Days
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/771 comprising storage means other than floating diffusion
• CPC Class Codes: H04N 25/772 comprising A/D, V/T, V/F, I/T or I/F converters

Abstract

Provided is an imaging device that performs multiple AD conversions including a first AD conversion and a second AD conversion for one pixel signal. A first memory has a bit width of N+1 bits (N is a natural number) and holds the least significant bit to the N+1th bit of a digital value obtained by the first AD conversion, and second memory has a bit width of M bits (M is a natural number) greater than N+1 bits and holds the least significant bit to the Mth bit of a digital value obtained by the second AD conversion.

Claims

1. An imaging device comprising:

a plurality of pixels arranged to form a plurality of columns and each configured to output a pixel signal by a photoelectric conversion in accordance with an incident light;

a plurality of analog-to-digital (AD) conversion circuits provided correspondingly to the plurality of columns and each configured to perform analog-to-digital conversions for the pixel signal, each of the AD conversion circuits being configured to performs multiple AD conversions including a first AD conversion and a second AD conversion for a singular one of the pixel signal; and

a signal processing circuit configured to add and/or average a first digital value obtained by the first AD conversion and a second digital value obtained by the second AD conversion,

wherein the signal processing circuit is configured to use the least significant bit to an N+1th bit of the first digital value and the least significant bit to an Mth bit of the second digital value, where N is a natural number and M is a natural number greater than N+1, while at least an Mth bit of the first digital value is not used in adding and averaging.

2. The imaging device according to claim 1, wherein each of the AD conversion circuits includes a successive approximation AD conversion circuit that performs the first AD conversion and the second AD conversion by comparing the pixel signal with a voltage signal for a successive approximation operation to successively perform a binary search.

3. The imaging device according to claim 1, wherein the signal processing circuit is configured to:

obtain a differential value resulted by subtracting, from the first digital value, a value of the least significant bit to an N+1th bit of the second digital value, and

output a value obtained by adding a twofold value of the second digital value and the differential value.

4. The imaging device according to claim 1, wherein the signal processing circuit is configured to:

obtain a differential value resulted by subtracting, from the first digital value, a value of the least significant bit to an N+1th bit of the second digital value,

output a value obtained by adding a twofold value of the second digital value and the differential value when the differential value is within a range from −

(2N−

1) [LSB] to 2N−

1 [LSB], the range including −

(2N−

1) [LSB] and 2N−

1 [LSB],

output a value obtained by adding the twofold value of the second digital value and the differential value and subtracting 2N+1 from a result of the addition when the differential value is greater than 2N−

1 [LSB], and

output a value obtained by adding the twofold value of the second digital value and the differential value and adding 2N+1 to a result of the addition when the differential value is less than −

(2N−

1) [LSB].

5. An imaging system comprising:

the imaging device according to claim 1; and

a signal processing unit configured to process a signal output from the imaging device.

6. A signal processing device comprising:

a plurality of analog-to-digital (AD) conversion circuits each configured to perform analog-to-digital conversions for an analog signal generated by a photoelectric conversion in accordance with an incident light, each of the AD conversion circuits being configured to perform multiple AD conversions including a first AD conversion and a second AD conversion for a singular one of the analog signal; and

a signal processing circuit configured to add or average a first digital value obtained by the first AD conversion and a second digital value obtained by the second AD conversion,

wherein the signal processing circuit is configured to use the least significant bit to an N+1th bit of the first digital value and the least significant bit to an Mth bit of the second digital value, where N is a natural number and M is a natural number greater than N+1, while at least an Mth bit of the first digital value is not used.

7. The signal processing device according to claim 6, wherein each of the AD conversion circuits includes a successive approximation AD conversion circuit that performs the first AD conversion and the second AD conversion by comparing the pixel signal with a voltage signal for a successive approximation operation to successively perform a binary search.

8. The signal processing device according to claim 6, wherein the signal processing circuit configured to:

obtain a differential value resulted by subtracting, from the first digital value, a value of the least significant bit to an N+1th bit of the second digital value, and

output a value obtained by adding a twofold value of the second digital value and the differential value.

9. The imaging device according to claim 6, wherein the signal processing circuit is configured to:

obtain a differential value resulted by subtracting, from the first digital value, a value of the least significant bit to an N+1th bit of the second digital value,

output a value obtained by adding a twofold value of the second digital value and the differential value when the differential value is within a range from −

(2N−

1) [LSB] to 2N−

1 [LSB], the range including −

(2N−

1) [LSB] and 2N−

1 [LSB],

output a value obtained by adding the twofold value of the second digital value and the differential value and subtracting 2N+1 from a result of the addition when the differential value is greater than 2N−

1 [LSB], and

output a value obtained by adding the twofold value of the second digital value to the differential value and adding 2N+1 to a result of the addition when the differential value is less than −

(2N−

1) [LSB].

10. An imaging device comprising:

a plurality of pixels arranged to form a plurality of columns and each configured to output a pixel signal by a photoelectric conversion in accordance with an incident light;

a plurality of comparators provided correspondingly to the plurality of columns and each configured to determine a magnitude relationship in comparison between the pixel signal and a reference signal changing with time and output a control signal in response to an inversion of the magnitude relationship;

a counter configured to output a count value indicating elapsed time after the reference signal starts changing; and

a signal processing circuit,

wherein each of the comparators performs multiple comparisons including a first comparison and a second comparison for a singular one of the pixel signal,

wherein the signal processing circuit is configured to add and/or average a first count value obtained by the first comparison and a second count value obtained by the second comparison, and

wherein the signal processing circuit is configured to use the least significant bit to an N+1th bit of the first count value and the least significant bit to an Mth bit of the second count value, where N is a natural number and M is a natural number greater than N+1, while at least an Mth bit of the first count value is not used in adding and averaging.

11. The imaging device according to claim 10, wherein the count value is a Gray code including a plurality of bits.

12. The imaging device according to claim 10, wherein the counter outputs the count value common to the plurality of the comparators.

13. The imaging device according to claim 10, wherein the comparators are provided to the plurality of columns in one-to-one correspondence.

14. The imaging device according to claim 10, wherein at least two of the comparators are provided to each of the plurality of columns.

15. The imaging device according to claim 14, wherein the at least two of the comparators corresponding to a same column of the plurality of columns have input offset voltages that are different from each other.

16. The imaging device according to claim 10, wherein the count value output by the counter in the first comparison is a Gray code with N+1 bits, and

wherein the count value output by the counter in the second comparison is a Gray code with M bits.

17. The imaging device according to claim 10, further comprising:

first memories provided correspondingly to the plurality of columns and each configured to hold the count value at a point of time when the control signal is output and second memories provided correspondingly to the plurality of columns and each configured to hold the count value at a point of time when the control signal is output,

wherein each of the second memories includes;

a memory that has a bit width of N+1 bits and holds the least significant bit to an N+1th bit of the count value obtained by the second comparison, and

a ripple counter that has a bit width of M−

(N+1) bits and holds an N+2th bit to an Mth bit of a count value corresponding to a difference between the count value obtained by the second comparison and the count value obtained by the first comparison.

18. The imaging device according to claim 10, wherein the each of the comparators uses a same reference signal in the first comparison and the second comparison, and wherein the first comparison and the second comparison are performed during periods that are different from each other.

19. The imaging device according to claim 10, wherein each of the comparators:

determines a magnitude relationship in a comparison between the pixel signal and a first reference signal in the first comparison, and

determines a magnitude relationship in a comparison between the pixel signal and a second reference signal that is different from the first reference signal in the second comparison.

20. The imaging device according to claim 10, wherein the signal processing circuit is configured to:

obtain a differential value resulted by subtracting, from the first count value, a value of the least significant bit to an N+1th bit of the second count value, and

output a value obtained by adding a twofold value of the second count value and the differential value.

21. The imaging device according to claim 10, wherein the signal processing circuit is configured to:

obtain a differential value resulted by subtracting, from the first count value, a value of the least significant bit to an N+1th bit of the second count value,

output a value obtained by adding a twofold value of the second count value and the differential value when the differential value is within a range from −

(2N−

1) [LSB] to 2N−

1 [LSB], the range including −

(2N−

1) [LSB] and 2N−

1 [LSB],

output a value obtained by adding the twofold value of the second count value and the differential value and subtracting 2N+1 from a result of the addition when the differential value is greater than 2N−

1 [LSB], and

output a value obtained by adding the twofold value of the second count value and the differential value and adding 2N+1 to a result of the addition when the differential value is less than −

(2N−

1) [LSB].

22. An imaging system comprising:

the imaging device according to claim 10; and

a signal processing unit configured to process a signal output from the imaging device.

23. A signal processing device comprising:

a plurality of comparators each configured to determine a magnitude relationship in comparison between an analog signal generated by a photoelectric conversion in accordance with an incident light and a reference signal changing with time and to output a control signal in response to an inversion of the magnitude relationship;

a counter configured to output a count value indicating elapsed time after the reference signal starts changing; and

a signal processing circuit,

wherein each of the comparators performs multiple comparisons including a first comparison and a second comparison for a singular one of the analog signal,

wherein the signal processing circuit is configured to add and/or average a first count value obtained by the first comparison and a second count value obtained by the second comparison, and

wherein the signal processing circuit is configured to use the least significant bit to an N+1th bit of the first count value and the least significant bit to an Mth bit of the second count value, where N is a natural number and M is a natural number greater than N+1, while at least an Mth bit of the first count value is not used in adding and averaging.

24. The signal processing device according to claim 23, wherein the signal processing circuit is configured to:

obtain a differential value resulted by subtracting, from the first count value, a value of the least significant bit to an N+1th bit of the second count value, and

output a value obtained by adding a twofold value of the second count value and the differential value.

25. The signal processing device according to claim 23, wherein the signal processing circuit is configured to:

obtain a differential value resulted by subtracting, from the first count value, a value of the least significant bit to an N+1th bit of the second count value,

output a value obtained by adding a twofold value of the second count value and the differential value when the differential value is within a range from −

(2N−

1) [LSB] to 2N−

1 [LSB], the range including −

(2N−

1) [LSB] and 2N−

1 [LSB],

output a value obtained by adding the twofold value of the second count value and the differential value and subtracting 2N+1 from a result of the addition when the differential value is greater than 2N−

1 [LSB], and

output a value obtained by adding the twofold value of the second count value and the differential value and adding 2N+1 to a result of the addition when the differential value is less than −

(2N−

1) [LSB].

26. A method of signal processing comprising:

determining a magnitude relationship in comparison between an analog signal generated by a photoelectric conversion in accordance with an incident light and a reference signal changing with time, the determining including a first comparison and a second comparison for a singular one of the analog signal;

outputting a control signal in response to an inversion of the magnitude relationship;

outputting a count value indicating elapsed time after the reference signal starts changing; and

adding and/or averaging a first count value obtained by the first comparison and a second count value obtained by the second comparison,

wherein the adding and/or averaging uses the least significant bit to an N+1th bit of the first count value and the least significant bit to an Mth bit of the second count value, where N is a natural number and M is a natural number greater than N+1, while at least an Mth bit of the first count value is not used in the adding and/or averaging.