System and method for circuit simulation based on recurrent neural networks
First Claim
1. A circuit simulator configured to simulate a degraded output of a circuit comprising a plurality of transistors, the circuit simulator comprising:
- a behavioral recurrent neural network (RNN) comprising a plurality of neurons, each neuron of the behavioral RNN computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the behavioral RNN, the plurality of neurons of the behavioral RNN being configured to receive an input waveform comprising a discrete time sequence of input values and to compute a circuit output waveform comprising a discrete time sequence of output values;
a feature engine comprising a plurality of neurons, each neuron of the feature engine computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the feature engine, the plurality of neurons of the feature engine being configured to receive the circuit output waveform and to output a plurality of degraded features based on reliability models of the transistors of the circuits and in accordance with an aging time; and
a physics recurrent neural network (RNN) comprising a plurality of neurons, each neuron of the physics RNN computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the physics RNN, the plurality of neurons of the physics RNN being configured to receive the plurality of degraded features from the feature engine and to simulate the degraded output of the circuit, the degraded output of the circuit comprising a discrete time series of degraded output values.
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Abstract
According to one embodiment of the present invention a circuit simulator configured to simulate a degraded output of a circuit including a plurality of transistors includes: a behavioral recurrent neural network configured to receive an input waveform and to compute a circuit output waveform; a feature engine configured to model one or more degraded circuit elements in accordance with an aging time, to receive the circuit output waveform and to output a plurality of degraded features; and a physics recurrent neural network configured to receive the plurality of degraded features from the feature engine and to simulate the degraded output of the circuit.
6 Citations
24 Claims
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1. A circuit simulator configured to simulate a degraded output of a circuit comprising a plurality of transistors, the circuit simulator comprising:
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a behavioral recurrent neural network (RNN) comprising a plurality of neurons, each neuron of the behavioral RNN computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the behavioral RNN, the plurality of neurons of the behavioral RNN being configured to receive an input waveform comprising a discrete time sequence of input values and to compute a circuit output waveform comprising a discrete time sequence of output values; a feature engine comprising a plurality of neurons, each neuron of the feature engine computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the feature engine, the plurality of neurons of the feature engine being configured to receive the circuit output waveform and to output a plurality of degraded features based on reliability models of the transistors of the circuits and in accordance with an aging time; and a physics recurrent neural network (RNN) comprising a plurality of neurons, each neuron of the physics RNN computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the physics RNN, the plurality of neurons of the physics RNN being configured to receive the plurality of degraded features from the feature engine and to simulate the degraded output of the circuit, the degraded output of the circuit comprising a discrete time series of degraded output values. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for simulating a degraded output of a circuit comprising a plurality of transistors, the method comprising:
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supplying an input waveform comprising a discrete time sequence of input values to a behavioral recurrent neural network (RNN) comprising a plurality of neurons, each neuron of the behavioral RNN computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the behavioral RNN, the plurality of neurons of the behavioral RNN being configured to compute a circuit output waveform comprising a discrete time sequence of output values from the input waveform; supplying the circuit output waveform to a feature engine comprising a plurality of neurons, each neuron of the feature engine computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the feature engine, the plurality of neurons of the feature engine being configured to compute a plurality of degraded features from the circuit output waveform based on reliability models of the transistors of the circuit and in accordance with an aging time; and supplying the plurality of degraded features to a physics recurrent neural network (RNN) comprising a plurality of neurons, each neuron of the physics RNN computing a non-linear activation function as a weighted sum of inputs to the neuron in accordance with a plurality of parameters of the physics RNN, the plurality of neurons of the physics RNN being configured to simulate the degraded output of the circuit, the degraded output of the circuit comprising a discrete time series of degraded output values. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A system for simulating a degraded output of a circuit comprising a plurality of transistors, the system comprising:
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means for computing a circuit output waveform comprising a discrete time sequence of output values from an input waveform comprising a discrete time sequence of input values; means for computing a plurality of degraded features from the circuit output waveform based on reliability models of the transistors of the circuits and in accordance with an aging time; and means for simulating the degraded output of the circuit based on the plurality of degraded features, the degraded output of the circuit comprising a discrete time series of degraded output values. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
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Specification