Semiconductor modification process for conductive and modified electrical regions and related structures
First Claim
1. A method for fabricating an electronic component, comprising:
- depositing a spreading layer on a p-type GaN layer of the electrical component;
depositing a mask feature onto the spreading layer over a portion of the p-type GaN layer, the mask feature exposing a portion of the spreading layer over another portion of the p-type GaN layer;
removing the portion of the spreading layer over the other portion of the p-type GaN layer;
subsequent to removing the portion of the spreading layer, exposing the other portion of the p-type GaN layer to a plasma treatment to convert the other portion of the p-type GaN layer to n-type GaN, the portion of the p-type GaN layer being shielded from the plasma treatment; and
subsequent to the plasma treatment, annealing the p-type GaN layer to form a region that blocks current flow from the n-type GaN and a conductive contact from the portion of the p-type GaN layer shielded from the plasma treatment.
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Accused Products
Abstract
There is herein described a process for providing improved device performance and fabrication techniques for semiconductors. More particularly, the present invention relates to a process for forming features, such as pixels, on GaN semiconductors using a p-GaN modification and annealing process. The process also relates to a plasma and thermal anneal process which results in a p-GaN modified layer where the annealing simultaneously enables the formation of conductive p-GaN and modified p-GaN regions that behave in an n-like manner and block vertical current flow. The process also extends to Resonant-Cavity Light Emitting Diodes (RCLEDs), pixels with a variety of sizes and electrically insulating planar layer for electrical tracks and bond pads.
10 Citations
18 Claims
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1. A method for fabricating an electronic component, comprising:
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depositing a spreading layer on a p-type GaN layer of the electrical component; depositing a mask feature onto the spreading layer over a portion of the p-type GaN layer, the mask feature exposing a portion of the spreading layer over another portion of the p-type GaN layer; removing the portion of the spreading layer over the other portion of the p-type GaN layer; subsequent to removing the portion of the spreading layer, exposing the other portion of the p-type GaN layer to a plasma treatment to convert the other portion of the p-type GaN layer to n-type GaN, the portion of the p-type GaN layer being shielded from the plasma treatment; and subsequent to the plasma treatment, annealing the p-type GaN layer to form a region that blocks current flow from the n-type GaN and a conductive contact from the portion of the p-type GaN layer shielded from the plasma treatment. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for fabricating an electronic component, comprising:
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depositing a mask feature onto a portion of a p-type GaN layer of the electrical component; exposing another portion of the p-type GaN layer to a plasma treatment to convert the other portion of the p-type GaN layer to n-type GaN, the portion of the p-type GaN layer being shielded from the plasma treatment by the mask feature; subsequent to the plasma treatment, removing the mask feature from the portion of the p-type GaN layer; subsequent to the plasma treatment and removing the mask feature, depositing a spreading layer on the other portion of the p-type GaN layer; and subsequent to the depositing the spreading layer, annealing the p-type GaN layer to form a region that blocks current flow from the n-type GaN and a conductive contact from the portion of the p-type GaN layer shielded from the plasma treatment.
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14. A method for fabricating an electronic component, comprising:
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depositing a spreading layer on a p-type GaN layer of the electrical component; depositing a mask feature onto the spreading layer over a portion of the p-type GaN layer, the mask feature exposing a portion of the spreading layer over another portion of the p-type GaN layer; exposing the portion of the spreading layer over the other portion of the p-type GaN layer and the other portion of the p-type GaN layer to a plasma treatment to convert the other portion of the p-type GaN layer to n-type GaN, the portion of the p-type GaN layer being shielded from the plasma treatment; and subsequent to the plasma treatment, annealing the p-type GaN layer to form a region that blocks current flow from the n-type GaN and a conductive contact from the portion of the p-type GaN layer shielded from the plasma treatment. - View Dependent Claims (15, 16, 17, 18)
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Specification