Thin film transistor and preparation method thereof, array substrate and display apparatus
First Claim
1. A preparation method of a thin film transistor, comprising:
- an operation of forming a low temperature poly silicon active layer on a substrate, wherein the substrate comprising a first region and a second region;
the first region corresponds to a pattern of the low temperature poly silicon active layer to be formed, and the second region is at least positioned on both opposite sides of the low temperature poly silicon active layer to be formed, the low temperature poly silicon active layer comprises a predetermined region, a source electrode contact region and a drain electrode contact region, and the predetermined region corresponds to a region opposite to a source electrode and a drain electrode which are to be formed, and the source electrode contact region and the drain electrode contact region are respectively positioned on two opposite sides in the first region, which are close to the second region, andthe operation of forming the low temperature poly silicon active layer on the substrate includes;
forming a buffer layer on the first region and the second region of the substrate by a first patterning process, the buffer layer having a thickness at a portion corresponding to the first region greater than that at a portion corresponding to the second region;
forming an amorphous silicon layer on the buffer layer;
performing laser crystallization processing on the amorphous silicon layer so as to convert the amorphous silicon layer into a poly silicon layer;
removing the poly silicon layer on the second region by a second patterning process, and forming the low temperature poly silicon active layer on the first region; and
shielding a region in the predetermined region except a first portion region and a second portion region by a masking process;
carrying out ion doping in the source electrode contact region and the first portion region of the predetermined region, which is close to the source electrode contact region, so as to form a first doped region; and
carrying out ion doping in the drain electrode contact region and the second portion region of the predetermined region, which is close to the drain electrode contact region, so as to form a second doped region;
wherein the masking process and the first patterning process adopt a same mask; and
/or, the masking process and the second patterning process adopt a same mask;
wherein the operation of removing the poly silicon layer on the second region by the second patterning process and forming the low temperature poly silicon active layer on the first region comprises;
forming photoresist on the formed poly silicon layer;
carrying out exposure and development with the mask on the substrate on which the photoresist is formed so as to form a photoresist fully-reserved region and a photoresist fully-removed region, wherein the photoresist fully-reserved region corresponds to the first region, and the photoresist fully-removed region corresponds to the second region; and
removing the poly silicon layer exposed out of the photoresist fully-removed region by an etching process, so as to form a pattern of the low temperature poly silicon active layer; and
wherein the operation of shielding the region in the predetermined region except the first portion region and the second portion region of the predetermined region by the masking process comprises;
carrying out for a first-time exposure and development with the mask on the substrate on which the photoresist fully-reserved region is formed so as to form a first photoresist fully-reserved region and a first photoresist fully-removed region, wherein a fully-transmittance region of the mask corresponds to the first photoresist fully-removed region, and the first photoresist fully-removed region corresponds to the first doped region to be formed or the second doped region to be formed; and
a fully-non-transmittance region of the mask corresponds to the formed first photoresist fully-reserved region, and the first photoresist fully-reserved region corresponds to a remaining region of the photoresist fully-reserved region; and
carrying out for a second-time exposure and development with the mask on the substrate on which the first photoresist fully-reserved region is formed so as to form a second photoresist fully-reserved region and a second photoresist fully-removed region, wherein the fully-transmittance region of the mask corresponds to the second photoresist fully-removed region, and the second photoresist fully-removed region corresponds to the second doped region to be formed or the first doped region to be formed; and
the fully-non-transmittance region of the mask corresponds to the formed second photoresist fully-reserved region, and the second photoresist fully-reserved region corresponds to a remaining region of the first photoresist fully-reserved region.
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Accused Products
Abstract
A thin film transistor and a preparation method thereof, an array substrate and a display apparatus are provided. The preparation method includes an operation of forming a low temperature poly silicon active layer; a substrate has a first region and a second region; and the step includes: forming a buffer layer on the first region and the second region of the substrate, the buffer layer having a thickness at a portion corresponding to the first region greater than that at a portion corresponding to the second region; or, forming the buffer layer on the first region of the substrate; forming an amorphous silicon layer on the buffer layer; performing laser crystallization processing on the amorphous silicon layer so as to convert the amorphous silicon layer into a poly silicon layer; and removing the poly silicon layer on the second region, and forming the low temperature poly silicon active layer on the first region.
5 Citations
7 Claims
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1. A preparation method of a thin film transistor, comprising:
- an operation of forming a low temperature poly silicon active layer on a substrate, wherein the substrate comprising a first region and a second region;
the first region corresponds to a pattern of the low temperature poly silicon active layer to be formed, and the second region is at least positioned on both opposite sides of the low temperature poly silicon active layer to be formed, the low temperature poly silicon active layer comprises a predetermined region, a source electrode contact region and a drain electrode contact region, and the predetermined region corresponds to a region opposite to a source electrode and a drain electrode which are to be formed, and the source electrode contact region and the drain electrode contact region are respectively positioned on two opposite sides in the first region, which are close to the second region, andthe operation of forming the low temperature poly silicon active layer on the substrate includes; forming a buffer layer on the first region and the second region of the substrate by a first patterning process, the buffer layer having a thickness at a portion corresponding to the first region greater than that at a portion corresponding to the second region; forming an amorphous silicon layer on the buffer layer; performing laser crystallization processing on the amorphous silicon layer so as to convert the amorphous silicon layer into a poly silicon layer; removing the poly silicon layer on the second region by a second patterning process, and forming the low temperature poly silicon active layer on the first region; and shielding a region in the predetermined region except a first portion region and a second portion region by a masking process;
carrying out ion doping in the source electrode contact region and the first portion region of the predetermined region, which is close to the source electrode contact region, so as to form a first doped region; and
carrying out ion doping in the drain electrode contact region and the second portion region of the predetermined region, which is close to the drain electrode contact region, so as to form a second doped region;wherein the masking process and the first patterning process adopt a same mask; and
/or, the masking process and the second patterning process adopt a same mask;wherein the operation of removing the poly silicon layer on the second region by the second patterning process and forming the low temperature poly silicon active layer on the first region comprises;
forming photoresist on the formed poly silicon layer;
carrying out exposure and development with the mask on the substrate on which the photoresist is formed so as to form a photoresist fully-reserved region and a photoresist fully-removed region, wherein the photoresist fully-reserved region corresponds to the first region, and the photoresist fully-removed region corresponds to the second region; and
removing the poly silicon layer exposed out of the photoresist fully-removed region by an etching process, so as to form a pattern of the low temperature poly silicon active layer; andwherein the operation of shielding the region in the predetermined region except the first portion region and the second portion region of the predetermined region by the masking process comprises;
carrying out for a first-time exposure and development with the mask on the substrate on which the photoresist fully-reserved region is formed so as to form a first photoresist fully-reserved region and a first photoresist fully-removed region, wherein a fully-transmittance region of the mask corresponds to the first photoresist fully-removed region, and the first photoresist fully-removed region corresponds to the first doped region to be formed or the second doped region to be formed; and
a fully-non-transmittance region of the mask corresponds to the formed first photoresist fully-reserved region, and the first photoresist fully-reserved region corresponds to a remaining region of the photoresist fully-reserved region; and
carrying out for a second-time exposure and development with the mask on the substrate on which the first photoresist fully-reserved region is formed so as to form a second photoresist fully-reserved region and a second photoresist fully-removed region, wherein the fully-transmittance region of the mask corresponds to the second photoresist fully-removed region, and the second photoresist fully-removed region corresponds to the second doped region to be formed or the first doped region to be formed; and
the fully-non-transmittance region of the mask corresponds to the formed second photoresist fully-reserved region, and the second photoresist fully-reserved region corresponds to a remaining region of the first photoresist fully-reserved region. - View Dependent Claims (2, 3, 4, 5, 6, 7)
- an operation of forming a low temperature poly silicon active layer on a substrate, wherein the substrate comprising a first region and a second region;
Specification