Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate

• US 10,741,399 B2
• Filed: 02/14/2018
• Issued: 08/11/2020
• Est. Priority Date: 09/24/2004
• Status: Active Grant

• Current Assignee: President and Fellows of Harvard College (Harvard Corporation)
• Original Assignee: President and Fellows of Harvard College (Harvard Corporation)
• Inventors: Mazur, Eric, Shen, Mengyan
• Primary Examiner(s): Muse, Ismail A
• Application Number:
  US15/896,940
• Publication Number:
  US 20180182630A1
• Time in Patent Office: 909 Days
• CPC Class Codes: B23K 26/1224 in vacuum
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0259 Microstructure
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/2252 using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
• CPC Class Codes: H01L 21/268 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 21/302 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
• CPC Class Codes: H01L 21/67075 for wet etching
• CPC Class Codes: H01L 29/30 characterised by physical imperfections; having polished or roughened surface
• CPC Class Codes: H01L 29/34 the imperfections being on the surface
• CPC Class Codes: Y10S 438/94 Laser ablative material removal

Abstract

The present invention generally provides semiconductor substrates having submicron-sized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface.

Claims

1. A substrate, comprising:

a semiconductor substrate, wherein a surface layer of the semiconductor substrate exhibits a modified topography having a plurality of irregular features having an average height less than about 1 micrometer and an average width in a range of about 100 nm to about 500 nm, each of said irregular features exhibiting an undulating side surface extending from a base to a tip,

wherein said plurality of irregular features exhibit an average separation between adjacent features of about 500 nm.

2. The substrate of claim 1, wherein said irregular features have an average width in a range of about 100 nm to about 300 nm.

3. The substrate of claim 1, wherein said plurality of irregular features exhibit an average ratio of height to width in a range from 3 to 10.

4. The substrate of claim 1, wherein said semiconductor substrate comprises a silicon substrate.

5. The substrate of claim 1, wherein said semiconductor substrate comprises an n-doped silicon substrate.

6. The substrate of claim 1, wherein said surface layer has a thickness in a range of about 20 nm to about 1 micrometer.

7. The substrate of claim 1, wherein said irregular features have an average height in a range of about 500 nm to less than about 1 micrometer.

8. The substrate of claim 1, wherein said features protrude above an original surface of the semiconductor substrate by a distance in a range of about 100 nm to about 300 nm.

9. The substrate of claim 1, wherein at least a portion of said plurality of irregular features extend from a base to a tip at a level above an original surface of the semiconductor substrate by a distance in a range of about 100 nm to about 300 nm.

10. A substrate, comprising:

a semiconductor substrate, wherein a surface layer of the semiconductor substrate includes a plurality of protrusions of various heights, the plurality of protrusions characterized by an average width in a range of about 100 nm to about 300 nm and average ratio of height to width in a range of 3 to 10,

wherein said protrusions exhibit an average separation between adjacent protrusions of about 500 nm.

11. The substrate of claim 10, wherein said protrusions exhibit height variations characterized by an average height in a range of about 500 nm to about 1 micrometer.

12. The substrate of claim 10, wherein said protrusions protrude above an original surface of the semiconductor substrate by a distance in a range of about 100 nm to about 300 nm.

13. The substrate of claim 10, wherein said semiconductor substrate comprises a silicon substrate.

14. The substrate of claim 10, wherein said semiconductor substrate comprises an n-doped silicon substrate.

15. The substrate of claim 10, wherein said protrusions are disposed with a surface layer of the substrate having a thickness in a range of about 20 nm to about 1 micrometer.

16. A substrate, comprising:

a semiconductor substrate, wherein a surface layer of the semiconductor substrate includes a plurality of protrusions of various heights, each of the plurality of protrusions characterized by an undulating side surface extending from a base to a tip, said plurality of protrusions having an average height less than about 1 micrometer, wherein said protrusions have a width in a range of about 100 nm to about 500 nm.

17. The substrate of claim 16, wherein said plurality of protrusions exhibit an average ratio of height to width in a range of 3 to 10.

18. The substrate of claim 16, wherein said plurality of protrusions exhibit an average separation between adjacent protrusions of about 500 nm.