Drive control circuit, driving method thereof, and display device

• US 10,748,483 B2
• Filed: 11/15/2017
• Issued: 08/18/2020
• Est. Priority Date: 11/29/2016
• Status: Active Grant

• Current Assignee: Kunshan Govisionox Optoelectronics Co., Ltd (Visionox Technology, Inc.)
• Original Assignee: Kunshan Govisionox Optoelectronics Co., Ltd (Visionox Technology, Inc.)
• Inventors: Chen, Xinquan, Wang, Xiangqian, Zhu, Xiujian, Ge, Mingwei, Wang, Zheng
• Primary Examiner(s): Ketema, Benyam
• Application Number:
  US16/322,054
• Publication Number:
  US 20190272788A1
• Time in Patent Office: 1,007 Days
• CPC Class Codes: G09G 2310/0243 Details of the generation of driving signals
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 3/32 semiconductive, e.g. using light-emitting diodes [LED]
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor

Abstract

A drive control circuit, a driving method thereof and a display device are provided. The drive control circuit includes a drive integrated circuit, a transmit control circuit, a scan drive circuit, and a pixel circuit. The drive integrated circuit adjusts a duty cycle of a drive signal to generate a first drive signal and transmits the first drive signal to the transmit control circuit. The drive integrated circuit decreases the amplitude of a data signal to generate a first data signal and transmits the first data signal to the scan drive circuit. The transmit control circuit converts the received first drive signal into a second drive signal with a preset duty cycle and transmits the second drive signal to the pixel circuit. The preset duty cycle of the second drive signal is greater than the duty cycle of the drive signal to be outputted.

Claims

1. A drive control circuit, comprising:

a drive integrated circuit, a transmit control circuit, a scan drive circuit, and a pixel circuit;

wherein

the drive integrated circuit adjusts a duty cycle of a drive signal which is to be outputted, to generate a first drive signal, and transmits the first drive signal to the transmit control circuit;

the drive integrated circuit decreases the amplitude of a data signal which is to be outputted, to generate a first data signal, and transmits the first data signal to the scan drive circuit;

the scan drive circuit receives the first data signal and transmits the first data signal to the pixel circuit;

the transmit control circuit, connected between the drive integrated circuit and the pixel circuit, receives the first drive signal and converts the received first drive signal to a second drive signal with a preset duty cycle, and transmits the second drive signal to the pixel circuit, the preset duty cycle of the second drive signal being greater than the duty cycle of the drive signal which is to be outputted;

the pixel circuit receives the second drive signal and controls the corresponding pixel unit according to the received second drive signal and the first data signal transmitted by the scan drive circuit;

wherein, the transmit control circuit comprises a first P-type field effect transistor, a second P-type field effect transistor, a third P-type field effect transistor, and a first capacitor;

a source of the first P-type field effect transistor is connected to a first node, a gate of the first P-type field effect transistor is connected to a drain of the second P-type field effect transistor, and the drain is connected to a low electrical level;

a source of the second P-type field effect transistor is connected to a second node, a gate of the second P-type field effect transistor is connected to the first node, and a drain of the second P-type field effect transistor is connected to the gate of the first P-type field effect transistor;

a source of the third P-type field effect transistor is connected to a high electrical level, and a gate of the third P-type field effect transistor is connected to a signal input port, and a drain of the third P-type field effect transistor is connected to the second node;

one end of the first capacitor is connected to the first node, the other end is connected to the second node, and the second node is connected to a signal output port.

2. The drive control circuit according to claim 1, wherein, the transmit control circuit converts the received first drive signal to the second drive signal with the preset duty cycle by performing duty cycle inversion and current amplification processing of the received first drive signal, to generate the second drive signal with the preset duty cycle.

3. The drive control circuit according to claim 2, wherein, the transmit control circuit is connected to the drive integrated circuit via Hall the signal input port, and to the pixel circuit via the signal output port.

4. The drive control circuit according to claim 1, wherein, the drive integrated circuit further adjusts a cycle of the drive signal which is to be outputted, to make a cycle of the second drive signal transmitted to the pixel circuit be the same as a row cycle.

5. The drive control circuit according to claim 1, wherein, the preset duty cycle ranges from 40% to 90%.

6. A method for driving the drive control circuit according to claim 1, comprising the following steps:

adjusting, by the drive integrated circuit, a duty cycle of a drive signal which is to be outputted, to generate a first drive signal, and transmitting the first drive signal to the transmit control circuit; and

decreasing, by the drive integrated circuit, the amplitude of a data signal which is to be outputted, to generate a first data signal, and transmitting the first data signal to the scan drive circuit;

receiving and converting the first drive signal to a second drive signal with a preset duty cycle, and transmitting the second drive signal to the pixel circuit, by the transmit control circuit, the preset duty cycle of the second drive signal being greater than the duty cycle of the drive signal which is to be outputted; and

transmitting, by the scan drive circuit, the first data signal to the pixel circuit.

7. A display device, comprising the drive control circuit according to claim 1.

8. The display device according to claim 7, wherein, the display device is an AMOLED display device.

9. The method according to claim 6, further comprising controlling each row of the pixel circuit, wherein the controlling each row of the pixel circuit comprises turning off the pixel circuit when the second drive signal is at a high electrical level.

10. The method according to claim 9, wherein the controlling each row of the pixel circuit further comprises turning on the pixel circuit when data has been written and the second drive signal is at a low electrical level.