Voltage regulation in wireless power receivers

• US 10,804,742 B2
• Filed: 05/23/2017
• Issued: 10/13/2020
• Est. Priority Date: 05/27/2016
• Status: Active Grant

• Current Assignee: WiTricity Corporation
• Original Assignee: WiTricity Corporation
• Inventors: Atasoy, Oguz, Twelker, Karl, Sealy, Kylee Devro
• Primary Examiner(s): Fureman, Jared
• Assistant Examiner(s): Barnett, Joel
• Application Number:
  US15/602,775
• Publication Number:
  US 20170346343A1
• Time in Patent Office: 1,239 Days
• Field of Search: None
• CPC Class Codes: H01F 38/14 Inductive couplings for wireless supply or distribution of electric power using inductive coupling H02J50/10
• CPC Class Codes: H02J 50/12 of the resonant type
• CPC Class Codes: H04B 10/60 Receivers
• CPC Class Codes: H04B 5/79 for data transfer in combination with power transfer

Abstract

A wireless power receiver includes one or more tunable capacitors in parallel with an inductor. The wireless power receiver adapted to receive an induced voltage input at the inductor due to a magnetic field generated by a wireless power transmitter. The rectifier has an output with a rectified voltage and a rectified current. A controller has a first input for receiving a signal representative of the rectified voltage and a first output for supplying an adjustment signal to the tunable capacitor. The controller includes a processor coupled to the first input and is configured to operate on the signal representative of rectified voltage to produce a desired capacitance value for capacitor and provide the adjustment signal determined so as to adjust a capacitance value of capacitor to the desired capacitance value.

Claims

1. A wireless power receiver comprising:

a circuit comprising a first tunable capacitor in parallel with an inductor, the wireless power receiver adapted to receive an induced voltage input (V_induced) at the inductor due to a magnetic field generated by a wireless power transmitter, the wireless power receiver having an effective receiver resistance (R_receiver);

a second tunable capacitor coupled in series with the circuit;

a rectifier coupled to the circuit, the rectifier having an output with a rectified voltage (V_rect) and a rectified current (I_rect); and

a controller having a first input for receiving a first signal representative of the rectified voltage (V_rect) and a first output for supplying a first adjustment signal to the first tunable capacitor, the controller including a processor coupled to the first input and configured to;

operate on the first signal representative of the rectified voltage (V_rect) to produce a desired capacitance value (C_{2_desired}) of the first tunable capacitor; and

provide the adjustment signal to adjust a first capacitance value (C_{2_value}) of the first capacitor to the desired capacitance value (C_{2_desired});

wherein, to produce the desired capacitance value (C_{2_desired}), the controller is configured to;

receive, at a second input of the controller, a second signal representative of the rectified current (I_rect);

operate, in the processor, on the first signal and the second signal to determine a first power (P_L) to a load coupled to the output of the rectifier and a resistance (R_L) at the load;

operate, in the processor, on the effective receiver resistance (R_receiver) and the first power (P_L) to determine a second power (P_receiver) to the receiver; and

operate, in the processor, on the second power (P_receiver), the first capacitance value, and a second capacitance value of the second capacitor to determine an open circuit voltage value (V_open), wherein the desired capacitance value (C_{2_desired}) is a function of the open circuit voltage value (V_open).

2. The receiver of claim 1 wherein the processor is configured to compare the first signal representative of the rectified voltage (V_rect) to a range of voltages defined by an upper limit (V_upper) and a lower limit (V_lower), the range of voltages stored in a memory of the controller;

and wherein the controller is configured to transmit the first adjustment signal to the first tunable capacitor in response to the comparison of the first signal representative of the rectified voltage (V_rect) to the range of voltages.

3. The receiver of claim 1, wherein the controller includes a second output for supplying a second adjustment signal to the second tunable capacitor, wherein the controller, transmits, via the second output, the second adjustment signal to the second tunable capacitor to adjust a second capacitance value (C_{3_value}) of the second capacitor in response to a comparison of the first signal representative of the rectified voltage (V_rect) to a range of voltages defined by an upper limit (V_upper) and a lower limit (V_lower), the range of voltages stored in a memory of the controller.

4. The receiver of claim 3 wherein the controller selects the second capacitance value from the memory of the controller storing a lookup table that includes a selected second capacitance value for a given first capacitance value and a load voltage value (V_{L_value}) for at least one load resistance value (R_{L_value}).

5. The receiver of claim 3 wherein the controller selects the second capacitance value (C_{3_value}) of the second tunable capacitor such that the first capacitance value and the second capacitance value are resonant with an inductance value (L_{1_value}) of the inductor, with a resonant frequency (f_resonant).

6. The receiver of claim 5 wherein the resonant frequency (f_resonant) is approximately 6.78 MHz.

7. The receiver of claim 1 wherein the second capacitor comprises two or more capacitors coupled in parallel or in series.

8. The receiver of claim 1 wherein the second capacitor comprises a switched capacitor, pulse width modulation (PWM) controlled capacitor, varactor, or barium strontium titanate (BST) capacitor.

9. The receiver of claim 1 further comprising a means for adjusting the second capacitance value (C_{3_value}).

10. The receiver of claim 1 further comprising a means for adjusting the second capacitance value (C_{2_value}).

11. The receiver of claim 1 wherein the first capacitor comprises two or more capacitors coupled in parallel or in series.

12. The receiver of claim 1 further comprising a third tunable capacitor coupled in series with the inductor Rig wherein the controller includes a third output for supplying a third adjustment signal to the third tunable capacitor.

13. A method for regulating rectified voltage (V_rect) in a system including a controller coupled to a wireless power receiver, the wireless power receiver including a rectifier coupled to a circuit, the circuit comprising a first tunable capacitor in parallel with an inductor, the wireless power receiver having an effective receiver resistance (R_receiver), the rectifier having an output with the rectified voltage (V_rect) and a rectified current (I_rect), the method comprising:

receiving, at a first input of the controller, a first signal representative of the rectified voltage (V_rect),

operating, in a processor coupled to the first input, on the first signal to produce a desired capacitance value (C_{2_desired}) for the first capacitor; and

providing, via a first output of the controller, a first adjustment signal to adjust a first capacitance value (C_{2_value}) of the first capacitor to the desired capacitance value (C_{2_desired}),

wherein producing the desired capacitance value (C_{2_desired}) further comprises;

receiving, at a second input of the controller, a second signal representative of a rectified current (I_rect);

operating, in the processor, on the first signal and the second signal to determine a first power (P_L) to a load coupled to the output of the rectifier and a resistance (R_L) at the load;

operating, in the processor, on the effective receiver resistance (R_receiver) and the first power (P_L) to determine a second power (P_receiver) to the receiver; and

operating, in the processor, on the second power (P_receiver) to determine an open circuit voltage value (V_open), wherein the desired capacitance value (C_{2_desired}) is a function of the open circuit voltage value (V_open).

14. The method of claim 13 further comprising:

comparing, by the processor, the first signal representative of the rectified voltage (V_rect) to a range of voltages defined by an upper limit (V_upper) and a lower limit (V_lower), the range of voltages stored in a memory of the controller; and

transmitting, via the first output of the controller, the first adjustment signal to the first tunable capacitor in response to the comparison of the first signal representative of the rectified voltage V_rect to the range of voltages.

15. The method of claim 13 further comprising transmitting, via a second output of the controller, a second adjustment signal to a second tunable capacitor coupled in series with the circuit.

16. The method of claim 15 further comprising selecting, from a lookup table stored in a memory of the controller, a second capacitance value (C_{3_value}) for the second tunable capacitor based on a given first capacitance value, the lookup table including at least one load voltage value (V_L) for at least one load resistance (R_L).

17. The method of claim 15 further comprising adjusting, by the processor, the second capacitance value (C_{3_value}) of the second tunable capacitor such that first capacitance value and the second capacitance value are resonant with an inductance value (L_{1_value}) of the inductor, with a resonant frequency (f_resonant).

18. The method of claim 15 further comprising determining the second adjustment signal based on a comparison of the first signal representative of the rectified voltage (V_rect) to a range of voltages defined by an upper limit (V_upper) and a lower limit (V_lower), the range of voltages stored in a memory of the controller.

19. The method of claim 15 wherein the circuit includes a third tunable capacitor coupled in series with the inductor, wherein the controller includes a third output for supplying a third adjustment signal to the third tunable capacitor.