Circuit and method for controlling charge injection in radio frequency switches

• US 10,804,892 B2
• Filed: 11/29/2017
• Issued: 10/13/2020
• Est. Priority Date: 07/11/2005
• Status: Active Grant

• Current Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Original Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Inventors: Dribinsky, Alexander, Kim, Tae Youn, Kelly, Dylan J., Brindle, Christopher N.
• Primary Examiner(s): Jager, Ryan
• Application Number:
  US15/826,453
• Publication Number:
  US 20180212599A1
• Time in Patent Office: 1,049 Days
• Field of Search: 327436
• CPC Class Codes: H03K 17/04 Modifications for accelerating switching
• CPC Class Codes: H03K 17/06 Modifications for ensuring a fully conducting state
• CPC Class Codes: H03K 17/08 Modifications for protecting switching circuit against overcurrent or overvoltage
• CPC Class Codes: H03K 17/102 in field-effect transistor switches
• CPC Class Codes: H03K 17/161 in field-effect transistor switches
• CPC Class Codes: H03K 17/284 in field effect transistor switches
• CPC Class Codes: H03K 17/6874 in a symmetrical configuration
• CPC Class Codes: H03K 17/689 with galvanic isolation between the control circuit and the output circuit H03K17/78 takes precedence
• CPC Class Codes: H03K 2217/0009 AC switches, i.e. delivering AC power to a load

Abstract

A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors. A method for controlling charge injection in a switch circuit is disclosed whereby injected charge is generated at resistively-isolated nodes between series coupled switching transistors, and the injected charge is conveyed to at least one node of the switch circuit that is not resistively-isolated.

Claims

1. A radio-frequency (RF) signal switching circuit implemented as a monolithic integrated circuit (IC) on a semiconductor-on-insulator (SOI) substrate, including:

(a) a plurality of N signal switching MOSFET ACC transistors, each ACC transistor including (A) a gate coupled to a gate resistor configured to be coupled to a gate control signal, (B) a gate-controlled channel, and (C) an accumulated charge sink (ACS) electrically coupled to remove or control accumulated charge in the ACC transistor, wherein the plurality of ACC transistors are coupled in series through their respective gate-controlled channels between an input node and an output node to selectively convey an RF signal between the input node to the output node in response to the gate control signal, the ACC transistors further including at least one resistively-isolated inner node, each inner node located between adjacent pairs of the ACC transistors and receiving injected charge when the plurality of ACC transistors is switched from an ON state to an OFF state; and

(b) a plurality of charge injection control resistors, each charge injection control resistor operatively coupled between a corresponding one of the at least one resistively-isolated inner nodes and at least one of the input node or the output node to convey received injected charge from the corresponding resistively-isolated inner node to the input node and/or the output node.

2. The RF signal switching circuit of claim 1, wherein each gate resistor has a resistance of approximately Rg, and the impedance of each charge injection control resistor is in the range of about Rg/10N to about 10×

Rg/N.

3. The RF signal switching circuit of claim 2, wherein the impedance of each charge injection control resistor is greater than or equal to about Rg/N.

4. The RF signal switching circuit of claim 3, wherein the impedance of each charge injection control resistor is approximately equal to Rg/N.

5. The RF signal switching circuit of claim 1, wherein the ACC transistors are n-channel MOSFETs.

6. The RF signal switching circuit of claim 1, wherein the ACS selectively conveys accumulated charge from the ACS to the gate terminal of the ACC transistor.

7. The RF signal switching circuit of claim 1, further including a bias control circuit coupled to the ACS for providing a selectable ACS bias voltage that selectively controls accumulated charge.

8. The RF signal switching circuit of claim 1, wherein each charge injection control resistor has an impedance sufficiently low to effectively remove the received injected charge.

9. The RF signal switching circuit of claim 8, wherein each charge injection control resistor has an impedance sufficiently high to prevent degradation of the RF isolation performance of the RF signal switching circuit.

10. A radio-frequency (RF) signal switching circuit implemented as a monolithic integrated circuit (IC) on a semiconductor-on-insulator (SOI) substrate, including:

(a) a plurality of N signal switching MOSFETs, each MOSFET including (A) a gate coupled to a gate resistor configured to be coupled to a gate control signal, and (B) a gate-controlled channel, wherein the plurality of MOSFETs are coupled in series through their respective gate-controlled channels between an input node and an output node to selectively convey an RF signal between the input node to the output node in response to the gate control signal, the MOSFETs further including at least one resistively-isolated inner node, each inner node located between adjacent pairs of the MOSFETs and receiving injected charge when the plurality of MOSFETs is switched from an ON state to an OFF state; and

(b) a plurality of charge injection control resistors, each charge injection control resistor operatively coupled between a corresponding one of the at least one resistively-isolated inner nodes and at least one of the input node or the output node to convey received injected charge from the corresponding resistively-isolated inner node to the input node and/or the output node, each charge injection control resistor having an impedance sufficiently low to effectively remove the received injected charge.

11. The RF signal switching circuit of claim 10, wherein each charge injection control resistor has an impedance sufficiently high to prevent degradation of the RF isolation performance of the RF signal switching circuit.

12. The RF signal switching circuit of claim 10, wherein each gate resistor has a resistance of approximately Rg, and the impedance of each charge injection control resistor is in the range of about Rg/10N to about 10×

Rg/N.

13. The RF signal switching circuit of claim 12, wherein the impedance of each charge injection control resistor is greater than or equal to about Rg/N.

14. The RF signal switching circuit of claim 13, wherein the impedance of each charge injection control resistor is approximately equal to Rg/N.

15. The RF signal switching circuit of claim 10, wherein the MOSFET are n-channel MOSFETs.

16. The RF signal switching circuit of claim 10, wherein each of the MOSFETs comprises an accumulated charge control (ACC) transistor.

17. The RF signal switching circuit of claim 16, wherein the ACC transistor includes an accumulated charge sink (ACS) electrically coupled to remove or control accumulated charge in the ACC transistor.

18. The RF signal switching circuit of claim 17, wherein the ACS selectively conveys accumulated charge from the ACS to the gate terminal of the ACC transistor.

19. The RF signal switching circuit of claim 17, further including a bias control circuit coupled to the ACS for providing a selectable ACS bias voltage that selectively controls accumulated charge.

20. The RF signal switching circuit of claim 17, wherein the ACC transistors are n-channel MOSFETs.

21. A radio-frequency (RF) signal switching circuit implemented as a monolithic integrated circuit (IC) on a semiconductor-on-insulator (SOI) substrate, including:

(a) a plurality of N signal switching MOSFET transistors, each transistor including (A) a gate coupled to a gate resistor configured to be coupled to a gate control signal, and (B) a gate-controlled channel, wherein the plurality of transistors are coupled in series through their respective gate-controlled channels between an input node and an output node to selectively convey an RF signal between the input node to the output node in response to the gate control signal, the transistors further including at least one resistively-isolated inner node, each inner node located between adjacent pairs of the transistors and receiving injected charge when the plurality of transistors is switched from an ON state to an OFF state; and

(b) a plurality of charge injection control resistors, each charge injection control resistor operatively coupled between a corresponding one of the at least one resistively-isolated inner nodes and at least one of the input node or the output node to convey received injected charge from the corresponding resistively-isolated inner node to the input node and/or the output node, wherein each gate resistor has a resistance of approximately Rg, and the impedance of each charge injection control resistor is in the range of about Rg/10N to about 10×

Rg/N.

22. The RF signal switching circuit of claim 21, wherein the impedance of each charge injection control resistor is greater than or equal about Rg/N.

23. The RF signal switching circuit of claim 22, wherein the impedance of each charge injection control resistor is approximately equal to Rg/N.

24. The RF signal switching circuit of claim 21, wherein each of the signal switching MOSFET transistors comprises an accumulated charge control (ACC) transistor.

25. The RF signal switching circuit of claim 24, wherein the ACC transistor includes an accumulated charge sink (ACS) electrically coupled to remove or control accumulated charge in the ACC transistor.

26. The RF signal switching circuit of claim 25, wherein the ACS selectively conveys accumulated charge from the ACS to the gate terminal of the ACC transistor.

27. The RF signal switching circuit of claim 25, further including a bias control circuit coupled to the ACS for providing a selectable ACS bias voltage that selectively controls accumulated charge.

28. The RF signal switching circuit of claim 21, wherein the signal switching MOSFET transistors are n-channel MOSFETs.

29. The RF signal switching circuit of claim 28, wherein the n-channel MOSFETs are enhancement mode n-channel MOSFETs.

30. The RF signal switching circuit of claim 28, wherein each of the n-channel MOSFETs comprises an accumulated charge control (ACC) transistor.

31. The RF signal switching circuit of claim 30, wherein the ACC transistor includes an accumulated charge sink (ACS) electrically coupled to remove or control accumulated charge in the ACC transistor.

32. The RF signal switching circuit of claim 31, wherein the ACS selectively conveys accumulated charge from the ACS to the gate terminal of the ACC transistor.

33. The RF signal switching circuit of claim 31, further including a bias control circuit coupled to the ACS for providing a selectable ACS bias voltage that selectively controls accumulated charge.