Switch circuit and method of switching radio frequency signals

• US 10,812,068 B2
• Filed: 11/06/2019
• Issued: 10/20/2020
• Est. Priority Date: 10/10/2001
• Status: Expired due to Term

• Current Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Original Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Inventors: Burgener, Mark L., Cable, James S., Benton, Robert H.
• Primary Examiner(s): Vo, Nguyen T
• Application Number:
  US16/676,350
• Publication Number:
  US 20200076427A1
• Time in Patent Office: 349 Days
• CPC Class Codes: H01P 1/15 by semiconductor devices
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 17/102 in field-effect transistor switches
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 19/018521 of complementary type, e.g. CMOS
• CPC Class Codes: H03K 19/0944 using MOSFET or insulated gate field-effect transistors, i.e. IGFETH03K19/096 takes precedence
• CPC Class Codes: H03K 2017/0803 against radiation hardening
• CPC Class Codes: H04B 1/40 Circuits

Abstract

A novel RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. The switching and shunting transistor grouping pairs are controlled by a switching control voltage (SW) and its inverse (SW_). The switching and shunting transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. The stacking of transistor grouping devices, and associated gate resistors, increase the breakdown voltage across the series connected switch transistors and operate to improve RF switch compression. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. Several embodiments of the charge pump, level shifting, voltage divider, and RF buffer circuits are described. The inventive RF switch provides improvements in insertion loss, switch isolation, and switch compression.

Claims

1. An apparatus comprising:

a communication device, wherein the communication device includes at least one integrated circuit chip comprising a silicon on insulator (SOI) substrate, wherein the SOI substrate comprises at least a thin film silicon layer less than 150 nm;

wherein the at least one integrated circuit chip includes;

an RF circuit, an integrated digital control logic circuit to provide one or more control signals to the RF circuit, and a negative voltage generator circuit that comprises a charge pump to generate a negative voltage with respect to a reference voltage;

the RF circuit comprising;

a switch transistor grouping comprising a first plurality of metal oxide semiconductor field effect transistors (MOSFETs) arranged in a first stacked configuration, the switch transistor grouping controllable by a switch transistor grouping control signal to be in either a switch enable state or a switch disable state and coupled between a first switch node and a second switch node, and a shunt transistor grouping comprising a second plurality of MOSFET transistors arranged in a second stacked configuration, the shunt transistor grouping controllable by a shunt transistor grouping control signal to be in either a shunt enable state or a shunt disable state and coupled between a first shunt node and a second shunt node, wherein the first shunt node is coupled with the first switch node and the second shunt node is coupled to ground;

the negative voltage generator circuit comprising the charge pump to generate the negative voltage with respect to the reference voltage in which the negative voltage is to at least in part be employed with respect to one or more gates of respective MOSFET transistors of at least one of respective transistor groupings in the disable state;

the switch transistor grouping, in the switch enable state, to pass an RF signal between the first and second switch nodes and, in the switch disable state, to not pass the RF signal between the first and second switch nodes and, the shunt transistor grouping, in the shunt enable state, to shunt the first shunt node to the second shunt node and, in the shunt disable state, to not shunt the first shunt node to the second shunt node.

2. The apparatus of claim 1, wherein the reference voltage is ground.

3. The apparatus of claim 1, wherein the RF circuit is operable either to pass or not pass a high-power RF signal in connection with RF transmission of one or more RF signals by the communication device.

4. The apparatus of claim 1, wherein respective pluralities of the MOSFET transistors arranged in respective stacked configurations comprise at least three MOSFET transistors, the one or more gates of the respective MOSFET transistors being coupled to at least one respective resistor.

5. The apparatus of claim 4, wherein the at least one respective resistor has a value of at least 30 k ohms.

6. The apparatus of claim 1, wherein the MOSFET transistors comprise N-type MOSFET (NMOSFET) transistors.

7. The apparatus of claim 1, wherein the MOSFET transistors comprise sources and drains, the SOI substrate comprises at least the thin film silicon layer on an insulating layer, and the sources and drains extend through the entire thickness of the thin film silicon layer to the insulating layer.

8. The apparatus of claim 1, wherein an insulating layer of the SOI substrate is to at least increase electrical isolation between the RF circuit and the negative voltage generator circuit comprising the charge pump at least during communication device operation.

9. The apparatus of claim 1, wherein the respective transistor groupings arranged in the stacked configurations are capable to withstand a voltage across the respective transistor groupings having a voltage magnitude greater than a breakdown voltage of an individual MOSFET transistor in the stacked configurations.

10. The apparatus of claim 1, wherein the at least one integrated circuit chip comprises the integrated digital control logic circuit to provide the one or more control signals to control at least the respective transistor groupings in the RF circuit.

11. The apparatus of claim 10, and further comprising:

an RF buffer circuit coupled between the integrated digital control logic circuit and the RF circuit.

12. The apparatus of claim 10, and further comprising:

a level shifter circuit coupled between the integrated digital control logic circuit and the RF circuit.

13. The apparatus of claim 1, wherein the communication device comprises a cellular telephone.

14. The apparatus of claim 13, wherein the cellular telephone comprises an at least GSM compliant cellular telephone.

15. The apparatus of claim 14, wherein the at least one integrated circuit chip, in operation, to at least achieve electrical isolation between the RF circuit and the negative voltage generator circuit for use of the cellular telephone in an at least GSM compliant cellular wireless communication system.

16. An apparatus comprising:

at least one integrated circuit chip with a silicon on insulator (SOI) substrate, wherein the SOI substrate comprises at least a thin film silicon layer;

wherein the at least one integrated circuit chip includes;

an RF circuit, an integrated digital control logic circuit to provide the one or more control signals to the RF circuit, and a negative voltage generator circuit that comprises a charge pump to generate a negative voltage with respect to a reference voltage;

the RF circuit comprising;

a switch transistor grouping comprising a first plurality of metal oxide semiconductor field effect transistors (MOSFETs) arranged in a first stacked configuration, the switch transistor grouping controllable by a switch transistor grouping control signal to be in either a switch enable state or a switch disable state and coupled between a first switch node and a second switch node, and a shunt transistor grouping comprising a second plurality of MOSFET transistors arranged in a second stacked configuration, the shunt transistor grouping controllable by a shunt transistor grouping control signal to be in either a shunt enable state or a shunt disable state and coupled between a first shunt node and a second shunt node, wherein the first shunt node is coupled with the first switch node and the second shunt node is coupled to ground;

the negative voltage generator circuit comprising the charge pump to generate the negative voltage with respect to the reference voltage in which the negative voltage is to at least in part be employed with respect to one or more gates of respective MOSFET transistors of at least one of the respective transistor groupings in the disable state;

the switch transistor grouping, in the switch enable state, to pass an RF signal between the first and second switch nodes and, in the switch disable state, to not pass the RF signal between the first and second switch nodes and, the shunt transistor grouping, in the shunt enable state, to shunt the first shunt node to the second shunt node and, in the shunt disable state, to not shunt the first shunt node to the second shunt node.

17. The apparatus of claim 16, wherein the reference voltage is ground.

18. The apparatus of claim 16, wherein the RF circuit is operable either to pass or not pass a high-power RF signal in connection with RF transmission of one or more RF signals.

19. The apparatus of claim 16, wherein respective pluralities of the MOSFET transistors arranged in respective stacked configurations comprise at least three MOSFET transistors, the one or more gates of the respective MOSFET transistors being coupled to at least one respective resistor.

20. The apparatus of claim 19, wherein the at least one respective resistor has a value of at least 30 kohms.

21. The apparatus of claim 16, wherein the MOSFET transistors comprise N-type MOSFET (NMOSFET) transistors.

22. The apparatus of claim 21, wherein the thin film silicon layer has a thickness of less than 150 nm.

23. The apparatus of claim 16, wherein the MOSFET transistors comprise sources and drains, the SOI substrate comprises at least the thin film silicon layer on an insulating layer, and the sources and drains extend through the entire thickness of the thin film silicon layer to the insulating layer.

24. The apparatus of claim 16, wherein an insulating layer of the SOI substrate is to at least increase electrical isolation between the RF circuit and the negative voltage generator circuit comprising the charge pump at least during apparatus operation.

25. The apparatus of claim 16, wherein the respective transistor groupings arranged in the stacked configurations are capable to withstand a voltage across the respective transistor groupings having a voltage magnitude greater than a breakdown voltage of an individual MOSFET transistor in the stacked configurations.

26. The apparatus of claim 16, wherein the at least one integrated circuit chip comprises the integrated digital control logic circuit to provide the one or more control signals to control at least the respective transistor groupings in the RF circuit.

27. The apparatus of claim 26, and further comprising:

an RF buffer circuit coupled between the integrated digital control logic circuit and the RF circuit.

28. The apparatus of claim 26, and further comprising:

a level shifter circuit coupled between the integrated digital control logic circuit and the RF circuit.

29. The apparatus of claim 16, wherein the at least one integrated circuit chip is capable to operate in a cellular wireless communication system.

30. The apparatus of claim 16, wherein the at least one integrated circuit chip, in operation, to at least achieve electrical isolation between the RF circuit and the negative voltage generator circuit for use of the apparatus in an at least GSM compliant cellular wireless communication system.