Memory system architectures using a separate system control path or channel for processing error information

  • US 10,824,499 B2
  • Filed: 01/08/2018
  • Issued: 11/03/2020
  • Est. Priority Date: 08/19/2014
  • Status: Active Grant
First Claim
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1. A system, comprising:

  • a memory that stores data, corrects an error in data read from the stored data, and generates error information in response to correcting the error in the data read from the stored data; and

    a processor coupled to the memory through a first communication path and a second communication path, the first communication path being part of a main memory path and the second communication path being part of a system control path, the second communication path being separate from the first communication path, the processor;

    receiving the data read from the stored data; and

    receiving the error information from the memory,wherein the second communication path comprises an out-of-band communication path with respect to the first communication path.

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