Display apparatus and source driver thereof and operating method

• US 10,832,627 B2
• Filed: 07/14/2016
• Issued: 11/10/2020
• Est. Priority Date: 07/14/2016
• Status: Active Grant

• Current Assignee: Novatek Microelectronics Corporation (Novatek Microelectronics Corp Limited)
• Original Assignee: Novatek Microelectronics Corporation (Novatek Microelectronics Corp Limited)
• Inventors: Cheng, Jhih-Siou, Liu, Yi-Chuan
• Primary Examiner(s): Joseph, Dennis P
• Application Number:
  US15/209,778
• Publication Number:
  US 20180018928A1
• Time in Patent Office: 1,580 Days
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2300/0828 forming a digital to analog [D/A] conversion circuit
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2310/0291 Details of output amplifiers or buffers arranged for use in a driving circuit
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2320/0673 for control of gamma adjustment, e.g. selecting another gamma curve
• CPC Class Codes: G09G 2330/028 Generation of voltages supplied to electrode drivers in a matrix display other than LCD
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers

Abstract

A display apparatus, a source driver of the display apparatus and an operating method of the source driver are provided. The display apparatus includes a display panel, at least one gate driver and a plurality of source drivers. The display panel includes a plurality of source lines and a plurality of gate lines. A plurality of output terminals of the gate driver are coupled to the gate lines in one-to-one manner. A plurality of output terminals of the source drivers are coupled to the source lines in one-to-one manner to provide a plurality of source driving voltages to the source lines. The source driving voltages include different coarse compensation voltages. The coarse compensation voltages are respectively configured based on distances between the source drivers which control the source lines and input terminals of the gate lines of the display panel.

Claims

1. A display apparatus, comprising:

a display panel, comprising a plurality of source lines and a plurality of gate lines, wherein each of the source lines is perpendicular to each of the gate lines;

at least one gate driver having a plurality of output terminals coupled to the gate lines; and

a plurality of source drivers having a plurality of output terminals coupled to the source lines to provide a plurality of source driving voltages to the source lines, wherein the plurality of source driving voltages include first coarse compensation voltages assigned by a first source driver of the plurality of source drivers, and the source driving voltages include second coarse compensation voltages assigned by a second source driver of the plurality of source drivers,

wherein each of the first coarse compensation voltages assigned by the first source driver has the same first voltage value, each of the second coarse compensation voltages assigned by the second source driver has the same second voltage value, and the first coarse compensation voltages assigned by the first source driver are different from the second coarse compensation voltages assigned by the second source driver,

wherein the first coarse compensation voltages are respectively configured based on distances between the first source driver and input terminals of the gate lines so as to compensate for feed-through voltages induced by parasitic capacitances between the source lines controlled by the first source driver and the gate lines,

wherein the second coarse compensation voltages are respectively configured based on distances between the second source driver and input terminals of the gate lines so as to compensate for feed-through voltages induced by parasitic capacitances between the source lines controlled by the second source driver and the gate lines.

2. The display apparatus according to claim 1, wherein one of the source drivers comprises:

a programmable gamma generating circuit, configured to use one corresponding coarse compensation voltage among the coarse compensation voltages to respectively compensate original gamma voltages so as to provide a plurality of compensated gamma voltages; and

a plurality of drive channel circuits, coupled to the programmable gamma generating circuit to receive the compensated gamma voltages, wherein each of the drive channel circuits comprises a digital-to-analog converter and an output buffer, the digital-to-analog converter converts digital pixel data into a source driving voltage according to the compensated gamma voltages, a first input terminal of the output buffer is coupled to an output terminal of the digital-to-analog converter to receive the source driving voltage, and the output buffer is configured to output the source driving voltage to one corresponding source line among the source lines.

3. The display apparatus of claim 1, further comprising:

a timing controller, coupled to the source drivers and the gate driver, wherein the timing controller provides different voltage setting instructions respectively to a plurality of programmable gamma generating circuits of the source drivers to set a plurality of compensated gamma voltages for each source driver, wherein the voltage setting instructions respectively determine the coarse compensation voltages.

4. The display apparatus according to claim 1, wherein the first source driver of the plurality of source drivers comprises:

a programmable gamma generating circuit, configured to use one corresponding coarse compensation voltage among the coarse compensation voltages to respectively compensate original gamma voltages so as to provide a plurality of compensated gamma voltages; and

a plurality of drive channel circuits, coupled to the programmable gamma generating circuit to receive the compensated gamma voltages and a plurality of fine compensation voltages, wherein a plurality of output terminals of the drive channel circuits are coupled to the source lines with respect to the first source driver to provide a plurality of compensated source driving voltages with respect to the first source driver, the compensated source driving voltages with respect to the first source driver are configured to include different fine compensation voltages which are respectively provided to the plurality of drive channel circuits, and wherein the fine compensation voltages are respectively configured based on distances between the source lines with respect to the first source driver and the input terminal of the gate lines.

5. The display apparatus according to claim 4, wherein each of the drive channel circuits comprises:

a digital-to-analog converter, coupled to the programmable gamma generating circuit to receive the compensated gamma voltages, wherein the digital-to-analog converter converts digital pixel data into a source driving voltage according to the compensated gamma voltages; and

an output buffer having a first input terminal coupled to an output terminal of the digital-to-analog converter to receive the source driving voltage, and a second input terminal coupled to a reference voltage generating unit to receive one corresponding reference voltage among a plurality of reference voltages, and an output terminal outputting one of the compensated source driving voltages to one corresponding source line among the source lines with respect to the first source driver, wherein the plurality of reference voltages are the fine compensation voltages and the corresponding compensated source driving voltage outputted by the output buffer is the source driving voltage outputted by the digital-to-analog converter plus one corresponding fine compensation voltage among the fine compensation voltages.

6. The display apparatus according to claim 5, wherein the output buffer comprises:

a first current source;

a first transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the first current source;

a second transistor having a control terminal coupled to the output terminal of the output buffer, and a first terminal coupled to the first current source;

a second current source;

a third transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the second current source;

a fourth transistor having a control terminal coupled to the second input terminal of the output buffer, and a first terminal coupled to the second current source; and

a gain and output stage having a first differential input pair and an output terminal, wherein a first input terminal of the first differential input pair is coupled to a second terminal of the first transistor and a second terminal of the third transistor, a second input terminal of the first differential input pair is coupled to a second terminal of the second transistor and a second terminal of the fourth transistor, and the output terminal of the gain and output stage is coupled to the output terminal of the output buffer.

7. The display apparatus according to claim 6, wherein the output buffer further comprises:

a third current source;

a fifth transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the third current source;

a sixth transistor having a control terminal coupled to the output terminal of the output buffer, and a first terminal coupled to the third current source;

a fourth current source;

a seventh transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the fourth current source; and

an eighth transistor having a control terminal coupled to the second input terminal of the output buffer, and a first terminal coupled to the fourth current source,

wherein the gain and output stage further has a second differential input pair, a first input terminal of the second differential input pair is coupled to a second terminal of the fifth transistor and a second terminal of the seventh transistor, and a second input terminal of the second differential input pair is coupled to a second terminal of the sixth transistor and a second terminal of the eighth transistor.

8. The display apparatus according to claim 5, wherein the reference voltage generating unit comprises:

a resistor string having a first tell iinal and a plurality of voltage dividing nodes, wherein the first terminal of the resistor string receives a rough gamma voltage provided by the programmable gamma generating circuit, and the voltage dividing nodes are respectively coupled to the second input terminals of the output buffers of the drive channel circuits.

9. The display apparatus according to claim 5, wherein the reference voltage generating unit comprises:

a plurality of resistor strings having a plurality of first terminals respectively receiving a plurality of rough gamma voltages provided by the programmable gamma generating circuit; and

a plurality of selection circuits having output terminals respectively coupled to the second input terminals of the output buffers of the drive channel circuits, wherein the selection circuits are configured to selectively connect a plurality of voltage dividing nodes of the resistor strings respectively to the second input terminals of the output buffers.

10. The display apparatus according to claim 9, wherein the reference voltage generating unit further comprises:

a plurality of programmable current sources, respectively coupled to a plurality of second terminals of the resistor strings, wherein the programmable current sources are configured to provide current to the second terminals of the resistor strings or drain current from the second terminals of the resistor strings.

11. The display apparatus according to claim 10, wherein one of the programmable current sources comprises:

a first current source having a current output terminal coupled to the second terminal of one corresponding resistor string among the resistor strings, wherein the first current source determines whether to provide current to the second terminal of the corresponding resistor string according to a first control signal; and

a second current source having a current input terminal coupled to the second terminal of the corresponding resistor string, wherein the second current source determines whether to drain current from the second terminal of the corresponding resistor string according to a second control signal.

12. A source driver, configured to drive a plurality of source lines of a display panel, and comprising:

a programmable gamma generating circuit, configured to provide a plurality of gamma voltages; and

a plurality of drive channel circuits, coupled to the programmable gamma generating circuit to receive the gamma voltages, wherein a plurality of output terminals of the drive channel circuits are coupled to the source lines to provide a plurality of compensated source driving voltages to the source lines, and the plurality of compensated source driving voltages include multiple coarse compensation voltages and multiple fine compensation voltages, wherein each of the coarse compensation voltages provided from different drive channel circuits has the same voltage value, and each of the fine compensation voltages provided from different drive channel circuits has a different voltage value,

wherein the fine compensation voltages are respectively configured based on distances between input terminals of a plurality of gate lines of the display panel and the source lines connecting to the source driver so as to compensate for feed-through voltages induced by parasitic capacitances between the source lines and the gate lines, wherein each of the source lines is perpendicular to each of the gate lines.

13. The source driver according to claim 12, wherein the programmable gamma generating circuit is configured to use the coarse compensation voltages to respectively compensate original gamma voltages in such a way that each of the plurality of gamma voltages outputted by the programmable gamma generating circuit is a corresponding original gamma voltage plus one of the coarse compensation voltages.

14. The source driver according to claim 12, wherein the source driver further comprises a reference voltage generating unit, and each of the drive channel circuits comprises:

a digital-to-analog converter, coupled to the programmable gamma generating circuit to receive the gamma voltages, wherein the digital-to-analog converter converts digital pixel data into a source driving voltage according to the gamma voltages; and

an output buffer having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the output buffer is coupled to an output terminal of the digital-to-analog converter to receive the source driving voltage, the second input terminal of the output buffer is coupled to the reference voltage generating unit to receive one corresponding reference voltage among a plurality of reference voltages, and the output terminal of the output buffer outputs one of a plurality of compensated source driving voltages to one corresponding source line among the source lines, wherein the plurality of reference voltages are a plurality of fine compensation voltages and the compensated source driving voltage outputted by the output buffer is the source driving voltage outputted by the digital-to-analog converter plus one corresponding fine compensation voltage among the fine compensation voltages.

15. The source driver according to claim 14, wherein the output buffer comprises:

a first current source;

a first transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the first current source;

a second transistor having a control terminal coupled to the output terminal of the output buffer, and a first terminal coupled to the first current source;

a second current source;

a third transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the second current source;

a fourth transistor having a control terminal coupled to the second input terminal of the output buffer, and a first terminal coupled to the second current source; and

a gain and output stage having a first differential input pair and an output terminal, wherein the a first input terminal of the first differential input pair is coupled to a second terminal of the first transistor and a second terminal of the third transistor, a second input terminal of the first differential input pair is coupled to a second terminal of the second transistor and a second terminal of the fourth transistor, and the output terminal of the gain and output stage coupled to the output terminal of the output buffer.

16. The source driver according to claim 15, wherein the output buffer further comprises:

a third current source;

a fifth transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the third current source;

a sixth transistor having a control terminal coupled to the output terminal of the output buffer, and a first terminal coupled to the third current source;

a fourth current source;

a seventh transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the fourth current source; and

an eighth transistor having a control terminal coupled to the second input terminal of the output buffer, and a first terminal coupled to the fourth current source,

wherein the gain and output stage further has a second differential input pair, wherein a first input terminal of the second differential input pair is coupled to a second terminal of the fifth transistor and a second terminal of the seventh transistor, and a second input terminal of the second differential input pair is coupled to a second terminal of the sixth transistor and a second terminal of the eighth transistor.

17. The source driver according to claim 14, wherein the reference voltage generating unit comprises:

a resistor string having a first terminal and a plurality of voltage dividing nodes, wherein the first terminal of the resistor string receives a rough gamma voltage provided by the programmable gamma generating circuit, and the voltage dividing nodes respectively coupled to the second input terminals of the output buffers of the drive channel circuits.

18. The source driver according to claim 14, wherein the reference voltage generating unit comprises:

a plurality of resistor strings having a plurality of first terminals respectively receiving a plurality of rough gamma voltages provided by the programmable gamma generating circuit; and

a plurality of selection circuits having output terminals respectively coupled to the second input terminals of the output buffers of the drive channel circuits, wherein the selection circuits are configured to selectively connect a plurality of voltage dividing nodes of the resistor strings respectively to the second input terminals of the output buffers.

19. The source driver according to claim 18, wherein the reference voltage generating unit further comprises:

a plurality of programmable current sources, respectively coupled to a plurality of second terminals of the resistor strings, wherein the programmable current sources are configured to provide current to the second terminals of the resistor strings or drain current from the second terminals of the resistor strings.

20. The source driver according to claim 19, wherein one of the programmable current sources comprises:

a first current source having a current output terminal coupled to the second terminal of one corresponding resistor string among the resistor strings, wherein the first current source determines whether to provide current to the second terminal of the corresponding resistor string according to a first control signal; and

a second current source having a current input terminal coupled to the second terminal of the corresponding resistor string, wherein the second current source determines whether to drain current from the second terminal of the corresponding resistor string according to a second control signal.

21. An operating method of a source driver, wherein the source driver is configured to drive a plurality of source lines of a display panel, the display panel includes a plurality of gate lines respectively perpendicular to each of the source lines, and the operation method comprises:

providing a plurality of gamma voltages to a plurality of drive channel circuits of the source driver;

respectively providing multiple coarse compensation voltages and multiple fine compensation voltages to the plurality of drive channel circuits, wherein each of the coarse compensation voltages provided from different drive channel circuits has the same voltage value, and each of the fine compensation voltages provided from different drive channel circuits has a different voltage value, wherein the fine compensation voltages are respectively configured based on distances between input terminals of the gate lines and the source lines connecting to the source driver so as to compensate for feed-through voltages induced by parasitic capacitances between the source lines and the gate lines;

respectively, through the drive channel circuits, compensating a plurality of source driving voltages by using the coarse compensation voltages and the fine compensation voltages to obtain a plurality of compensated source driving voltages; and

providing the plurality of compensated source driving voltages to the source lines by the drive channel circuits.

22. The operating method according to claim 21, further comprising:

using the coarse compensation voltages to respectively compensate a plurality of original gamma voltages to generate the plurality of gamma voltages, in such a way that each of the gamma voltages is a corresponding original gamma voltage plus one of the coarse compensation voltages.