Stable digital integrator circuit for boost converter

• US 10,873,259 B2
• Filed: 10/29/2019
• Issued: 12/22/2020
• Est. Priority Date: 10/31/2018
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Tiruchengode Tirumurugga Bupathi, Anandha Ruban, Kannan, Anand, Ramesh Bhat, Dileep Kumar
• Primary Examiner(s): Yu, Norman
• Application Number:
  US16/667,130
• Publication Number:
  US 20200136507A1
• Time in Patent Office: 420 Days
• Field of Search: 381 58, 381 83, 381 93, 381120-121, 323282, 323271, 323283, 323285, 323234, 323280, 326 93
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 3/157 with digital control
• CPC Class Codes: H03M 1/785 using resistors, i.e. R-2R ladders
• CPC Class Codes: H04R 3/02 for preventing acoustic reaction , i.e. acoustic oscillatory feedback specially adapted for hearing aids H04R25/453

Abstract

An electrical device includes an integrated circuit having device circuitry and a boost converter coupled to the device circuitry. The boost converter includes a digital integrator circuit having: a first comparator; a second comparator; a counter configured to count up, count down, and pause based on a first output signal provided by the first comparator and based on a second output signal provided by the second comparator; and a digital-to-analog converter (DAC) configured to provide a feedback adjustment signal for the boost converter based on a count value provided by the counter.

Claims

1. An electrical device, comprising:

an integrated circuit having;

device circuitry; and

a boost converter coupled to the device circuitry, wherein the boost converter comprises a digital integrator circuit having;

a first comparator;

a second comparator;

a counter configured to count up, count down, and pause based on a first output signal provided by the first comparator and based on a second output signal provided by the second comparator; and

a digital-to-analog converter (DAC) configured to provide a feedback adjustment signal for the boost converter based on a count value provided by the counter;

wherein the first comparator is configured to provide the first output signal based on a comparison of a first input signal and a second input signal, wherein the first input signal combines a reference voltage with a hysteresis voltage, and wherein the second input signal is a feedback voltage proportional to an output voltage of the boost converter.

2. The electrical device of claim 1, wherein the second comparator is configured to provide the second output signal based on a comparison of a third input signal and the second input signal, wherein the third input signal is the reference voltage.

3. The electrical device of claim 2, wherein the DAC is configured to provide the first input signal to the first comparator, and to provide the third input signal to the second comparator.

4. A boost converter circuit, comprising:

a control circuit with an inner loop and an outer loop, wherein the outer loop comprises;

a digital integrator circuit having;

a first comparator with input nodes and an output node;

a second comparator with two input nodes and an output node;

a counter with a first input node coupled to the output node of the first comparator and with a second input node coupled to the output node of the second comparator; and

a digital-to-analog converter (DAC) coupled to an output node of the counter, wherein an output of the DAC is a feedback adjustment signal used by the control circuit to determine an on-time for the power switch;

wherein the output node of the first comparator provides a first control signal to the counter based on a comparison of a first input signal and a second input signal, wherein the first input signal combines a reference voltage with a hysteresis voltage, and wherein the second input signal is a feedback voltage proportional to an output voltage of the boost converter circuit.

5. The boost converter circuit of claim 4, wherein the output node of the second comparator provides a second control signal to the counter based on a comparison of a third input signal and the second input signal, wherein the third input signal is the reference voltage.

6. The boost converter circuit of claim 5, wherein the DAC comprises a resistor ladder DAC with a plurality of resistors and respective switches, and wherein the boost converter circuit further comprises:

a first decoder coupled between the output node of the counter and the DAC, wherein the first decoder is configured to close some of a first set of the respective switches to provide the feedback adjustment signal based on a count value at the output node of the counter; and

a second decoder coupled to the DAC, wherein the second decoder is configured to close some of a second set of the respective switches to provide the first input signal and the third input signal based on a programmable setting.

7. The boost converter circuit of claim 5, wherein the DAC is a first DAC, and wherein the boost converter circuit further comprises:

a second DAC;

a first decoder between the output node of the counter and the first DAC, wherein the first decoder is configured to drive the first DAC to provide the feedback adjustment signal based on a count value at the output node of the counter; and

a second decoder coupled to the second DAC, wherein the second decoder is configured to drive the second DAC to provide the first input signal and the third input signal based on a programmable setting.

8. A method, comprising:

receiving a target reference for an output voltage;

providing a feedback adjustment signal for an inner loop of a boost converter based on a digital counter with a count up function, a count down function, and a pause function; and

regulating the output voltage of the boost converter based on the reference target and the feedback adjustment signal;

wherein providing the feedback adjustment signal comprises;

providing a first comparator output based on a comparison of a first input signal and a second input signal, wherein the first input signal combines a reference voltage with a hysteresis voltage, and wherein the second input signal is a feedback voltage proportional with an output voltage of the boost converter;

providing a second comparator output based on a comparison of the second input signal and a third input signal, wherein the third input signal is the reference voltage;

providing the first and second output comparator outputs to the digital counter to direct the digital counter to perform one of the count up function, the count down function, and the pause function.

9. The method of claim 8, further comprising:

using a resistor ladder digital-to-analog converter (DAC) to output the first input signal and the third input signal based on a programmable setting; and

using the resistor ladder DAC to output the feedback adjustment signal based on an output of the digital counter.

10. The method of claim 8, further comprising:

using a first digital-to-analog converter (DAC) to output the feedback adjustment signal based on an output of the digital counter; and

using a second DAC to output the first input signal and the third input signal based on a programmable value.