Gate drive circuit, method of driving gate drive circuit, display device, and method of manufacturing array substrate
First Claim
1. A gate drive circuit, comprising a repair signal line, a plurality of output signal lines, and plurality of shift register units that are cascaded,wherein the repair signal line is configured to receive a repair signal;
- the plurality of output signal lines comprises a first output signal line and a plurality of second output signal lines, and the repair signal line is connected to the first output signal line, and is configured to transmit the repair signal to the first output signal line;
the plurality of shift register units comprises a first shift register unit and a plurality of second shift register units, and the plurality of second shift register units are correspondingly connected to the plurality of second output signal lines; and
the first output signal line corresponds to, but is in a state of being disconnected from, the first shift register unit, and the first output signal line and the plurality of second output signal lines are further configured to output a set of shift pulse signals,the gate drive circuit further comprises a plurality of cascade signal lines,wherein the first output signal line is connected to a next second shift register unit adjacent to the first shift register unit through a cascade signal line which corresponds to but is in a state of being disconnected from the first shift register unit, and is configured to transmit the repair signal as a trigger signal to the next second shift register unit adjacent to the first shift register unit,wherein each of the plurality of shift register units comprises a trigger signal output terminal and a pixel scanning signal output terminal,pixel scanning signal output terminals of the plurality of second shift register units are correspondingly connected to the plurality of second output signal lines, and trigger signal output terminals of the plurality of second shift register units are correspondingly connected to the plurality of cascade signal lines.
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Accused Products
Abstract
A gate drive circuit, a method of driving a gate drive circuit, a display device, and a method of manufacturing an array substrate are provided. The gate drive circuit includes a repair signal line, a plurality of output signal lines, and a plurality of shift register units that are cascaded. The repair signal line is configured to transmit the repair signal to the first output signal line. The plurality of shift register units include a first shift register unit and a plurality of second shift register units, and the plurality of second shift register units are correspondingly connected to the second output signal lines. The first output signal line corresponds to but is in a state of being disconnected to the first shift register unit, and the first output signal line and the plurality of second output signal lines are configured to output a set of shift pulse signals.
19 Citations
15 Claims
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1. A gate drive circuit, comprising a repair signal line, a plurality of output signal lines, and plurality of shift register units that are cascaded,
wherein the repair signal line is configured to receive a repair signal; -
the plurality of output signal lines comprises a first output signal line and a plurality of second output signal lines, and the repair signal line is connected to the first output signal line, and is configured to transmit the repair signal to the first output signal line; the plurality of shift register units comprises a first shift register unit and a plurality of second shift register units, and the plurality of second shift register units are correspondingly connected to the plurality of second output signal lines; and the first output signal line corresponds to, but is in a state of being disconnected from, the first shift register unit, and the first output signal line and the plurality of second output signal lines are further configured to output a set of shift pulse signals, the gate drive circuit further comprises a plurality of cascade signal lines, wherein the first output signal line is connected to a next second shift register unit adjacent to the first shift register unit through a cascade signal line which corresponds to but is in a state of being disconnected from the first shift register unit, and is configured to transmit the repair signal as a trigger signal to the next second shift register unit adjacent to the first shift register unit, wherein each of the plurality of shift register units comprises a trigger signal output terminal and a pixel scanning signal output terminal, pixel scanning signal output terminals of the plurality of second shift register units are correspondingly connected to the plurality of second output signal lines, and trigger signal output terminals of the plurality of second shift register units are correspondingly connected to the plurality of cascade signal lines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A gate drive circuit, comprising a repair signal line, a plurality of output signal lines, and a plurality of shift register units that are cascaded,
wherein the repair signal line is configured to receive a repair signal of a first voltage; -
the plurality of shift register units are correspondingly connected to the plurality of output signal lines, and are configured to output a set of shift pulse signals through the plurality of output signal lines; and the repair signal line and the plurality of output signal lines are insulated from each other, and the repair signal line extends across the plurality of output signal lines, the gate drive circuit further comprising a plurality of cascade signal lines, wherein each of the plurality of shift register units comprises a trigger signal output terminal and a pixel scanning signal output terminal, pixel scanning signal output terminals of the plurality of shift register units are correspondingly connected to the plurality of output signal lines, and trigger signal output terminals of the plurality of shift register units are correspondingly connected to the plurality of cascade signal lines. - View Dependent Claims (11, 12, 13, 14)
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15. A method of manufacturing an array substrate, comprising:
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forming a plurality of shift register units that are cascaded and a plurality of output signal lines on a base substrate, the plurality of shift register units being correspondingly connected to the plurality of output signal lines, forming a repair signal generation circuit and a repair signal line on the base substrate, the repair signal generation circuit being connected to the repair signal line, the repair signal line and the plurality of output signal lines being insulated from each other, and the repair signal line extending across the plurality of output signal lines; selecting a first shift register unit among the plurality of shift register units as needed, wherein the plurality of output signal lines comprises a first output signal line, and the first shift register unit is connected to the first output signal line; and connecting the repair signal line to the first output signal line, and disconnecting the first output signal line from the first shift register unit; the method of manufacturing the array substrate further comprises; forming a plurality of cascade signal lines on the base substrate, wherein the plurality of cascade signal lines and the repair signal line are in a same layer, the plurality of cascade signal lines extend across the plurality of output signal lines, and the plurality of cascade signal lines register units comprises a trigger signal output terminal and a pixel scanning signal output terminal, pixel scanning signal output terminals of the plurality of shift register units are correspondingly connected to the plurality of output signal lines, and trigger signal output terminals of the plurality of shift register units are correspondingly connected to the plurality of cascade signal lines; and disconnecting a cascade signal line connected to the first shift register unit from the first shift register unit, and connecting the cascade signal line that is disconnected from the first output signal line.
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Specification