Semiconductor device having an edge termination region comprising a first edge termination region of a second conductivity type adjacent to a second edge termination region of a first conductivity type

• US 11,094,779 B2
• Filed: 04/25/2017
• Issued: 08/17/2021
• Est. Priority Date: 05/02/2016
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Brandt, Philip Christoph, Stegner, Andre Rainer, Santos Rodriguez, Francisco Javier, Pfirsch, Frank Dieter, Schulze, Hans-Joachim, Pfaffenlehner, Manfred, Auer, Thomas
• Primary Examiner(s): Mai, Anh D
• Application Number:
  US15/496,223
• Publication Number:
  US 20170317165A1
• Time in Patent Office: 1,575 Days
• CPC Class Codes: H01L 21/2253 by ion implantation
• CPC Class Codes: H01L 21/2255 the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 21/266 using masks H01L21/26586 takes precedence
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 21/761 PN junctions
• CPC Class Codes: H01L 29/0615 by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] LDD or drain offset regions H01L29/7833
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/0649 Dielectric regions, e.g. SiO2 regions, air gaps
• CPC Class Codes: H01L 29/0688 characterised by the particular shape of a junction between semiconductor regions
• CPC Class Codes: H01L 29/66128 Planar diodes
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 29/7424 having a built-in localised breakdown/breakover region, e.g. self-protected against destructive spontaneous, e.g. voltage breakover, firing
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

An edge delimits a semiconductor body in a direction parallel to a first side of the semiconductor body. A peripheral area is arranged between the active area and edge. A first semiconductor region of a first conductivity type extends from the active area into the peripheral area. A second semiconductor region of a second conductivity type forms a pn-junction with the first semiconductor region. A first edge termination region of the second conductivity type arranged at the first side adjoins the first semiconductor region, between the second semiconductor region and edge. A second edge termination region of the first conductivity type arranged at the first side and between the first edge termination region and edge has a varying concentration of dopants of the first conductivity type which increases at least next to the first edge termination region substantially linearly with an increasing distance from the first edge termination region.

Claims

1. A semiconductor device, comprising:

a semiconductor body comprising;

a first side;

an edge delimiting the semiconductor body in a direction parallel to the first side;

an active area;

a peripheral area arranged between the active area and the edge;

a first semiconductor region of a first conductivity type extending from the active area into the peripheral area;

a second semiconductor region of a second conductivity type forming a pn-junction with the first semiconductor region;

a first edge termination region of the second conductivity type adjoining the first semiconductor region in the peripheral area, and arranged at the first side and between the second semiconductor region and the edge; and

a second edge termination region of the first conductivity type comprising a varying concentration of dopants of the first conductivity type, which increases at least next to the first edge termination region substantially linearly with an increasing distance from the first edge termination region and/or with an increasing distance from the active area, and arranged at the first side and between the first edge termination region and the edge;

wherein the first and second edge termination regions are separated from one another by a portion of the first semiconductor region.