Dielectric filter, transceiver device, and base station

• US 11,139,546 B2
• Filed: 08/16/2019
• Issued: 10/05/2021
• Est. Priority Date: 02/16/2017
• Status: Active Grant

• Current Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Huawei Technologies Co., Ltd. (Huawei Investment & Holding Co., Ltd.)
• Inventors: Jiang, Tao, Guo, Jiyong
• Primary Examiner(s): Yun, Eugene
• Application Number:
  US16/542,992
• Publication Number:
  US 20190372189A1
• Time in Patent Office: 781 Days
• Field of Search: 455 73
• CPC Class Codes: H01P 1/2002 Dielectric waveguide filters H01P1/212, H01P1/213, H01P1/215, H01P1/219 take precedence
• CPC Class Codes: H01P 1/2084 with dielectric resonators
• CPC Class Codes: H01P 7/06 Cavity resonators
• CPC Class Codes: H01P 7/10 Dielectric resonators
• CPC Class Codes: H04B 1/40 Circuits

Abstract

Example dielectric filters, transceiver devices, and base stations are described. One example dielectric filter includes a dielectric block whose surface is covered with a metal layer. The dielectric block includes at least two resonant cavities, and is provided with a via hole. The via hole is located between two adjacent resonant cavities, and an inner wall of the via hole is covered with a metal layer. A first partition ring is disposed on the surface of the dielectric block and is surrounding at least one opening of the via hole. The dielectric block is exposed in an area enclosed by an inner edge of the first partition ring and an outer edge of the first partition ring.

Claims

1. A dielectric filter, the dielectric filter comprising a dielectric block whose surface is covered with a metal layer, wherein the dielectric block comprises at least two resonant cavities, wherein the dielectric block further comprises at least two slots, and wherein the dielectric block is divided into the at least two resonant cavities by the at least two slots;

wherein the dielectric block is provided with a via hole, wherein the via hole is located between two adjacent resonant cavities, wherein the via hole is further located between two slots of the at least two slots, and wherein an inner wall of the via hole is covered with a metal layer; and

wherein a first partition ring is disposed on the surface of the dielectric block and is surrounding at least one opening of the via hole, and wherein the dielectric block is exposed in an area enclosed by an inner edge of the first partition ring and an outer edge of the first partition ring, wherein the first partition ring and the via hole form a structure that is equivalent to a capacitor, the inner edge of the first partition ring and an edge of the opening of the via hole are disposed at interval, and a capacitive coupling strength of the dielectric filter is associated with a size of the interval.

2. The dielectric filter according to claim 1, wherein an inner surface of each slot is covered with the metal layer, and wherein each resonant cavity is configured to be equivalent to a parallel circuit formed by an inductor and a capacitor.

3. The dielectric filter according to claim 1, wherein the inner edge of the first partition ring and an edge of an opening of the via hole are disposed at intervals.

4. The dielectric filter according to claim 1, wherein a center line of the first partition ring coincides with an axis of the via hole.

5. The dielectric filter according to claim 1, wherein the first partition ring is disposed on each of two opening sides of the via hole.

6. The dielectric filter according to claim 1, wherein the via hole is a circular via hole.

7. The dielectric filter according to claim 1, wherein the via hole is a polygonal via hole.

8. The dielectric filter according to claim 1, wherein the dielectric block is further provided with a second partition ring;

wherein the dielectric block is exposed between an inner edge and an outer edge of the second partition ring; and

wherein the metal layer in an area enclosed by the inner edge of the second partition ring serves as a signal input end or a signal output end.

9. The dielectric filter according to claim 1, wherein the first partition ring is disposed on a planar surface.

10. A transceiver device, the transceiver device comprising a dielectric filter, wherein the dielectric filter comprises a dielectric block whose surface is covered with a metal layer, wherein the dielectric block comprises at least two resonant cavities, wherein the dielectric block further comprises at least two slots, and wherein the dielectric block is divided into the at least two resonant cavities by the at least two slots;

wherein the dielectric block is provided with a via hole, wherein the via hole is located between two adjacent resonant cavities, wherein the via hole is further located between two slots of the at least two slots, and wherein an inner wall of the via hole is covered with a metal layer; and

wherein a first partition ring is disposed on the surface of the dielectric block and is surrounding at least one opening of the via hole, and wherein the dielectric block is exposed in an area enclosed by an inner edge of the first partition ring and an outer edge of the first partition ring, wherein the first partition ring and the via hole form a structure that is equivalent to a capacitor, the inner edge of the first partition ring and an edge of the opening of the via hole are disposed at interval, and a capacitive coupling strength of the dielectric filter is associated with a size of the interval.

11. The transceiver device according to claim 10, wherein an inner surface of each slot is covered with the metal layer, and wherein each resonant cavity is configured to be equivalent to a parallel circuit formed by an inductor and a capacitor.

12. The transceiver device according to claim 10, wherein the inner edge of the first partition ring and an edge of an opening of the via hole are disposed at intervals.

13. The transceiver device according to claim 10, wherein a center line of the first partition ring coincides with an axis of the via hole.

14. The transceiver device according to claim 10, wherein the first partition ring is disposed on each of two opening sides of the via hole.

15. The transceiver device according to claim 10, wherein the via hole is a circular via hole.

16. The transceiver device according to claim 10, wherein the via hole is a polygonal via hole.

17. The transceiver device according to claim 10, wherein the dielectric block is further provided with a second partition ring;

wherein the dielectric block is exposed between an inner edge and an outer edge of the second partition ring; and

wherein the metal layer in an area enclosed by the inner edge of the second partition ring serves as a signal input end or a signal output end.

18. A base station, the base station comprising a transceiver device, the transceiver device comprising a dielectric filter, wherein the dielectric filter comprises a dielectric block whose surface is covered with a metal layer, and wherein the dielectric block comprises at least two resonant cavities, wherein the dielectric block further comprises at least two slots, and wherein the dielectric block is divided into the at least two resonant cavities by the at least two slots;

wherein the dielectric block is provided with a via hole, wherein the via hole is located between two adjacent resonant cavities, wherein the via hole is further located between two slots of the at least two slots, and wherein an inner wall of the via hole is covered with a metal layer; and

wherein a first partition ring is disposed on the surface of the dielectric block and is surrounding at least one opening of the via hole, and wherein the dielectric block is exposed in an area enclosed by an inner edge of the first partition ring and an outer edge of the first partition ring, wherein the first partition ring and the via hole form a structure that is equivalent to a capacitor, the inner edge of the first partition ring and an edge of the opening of the via hole are disposed at interval, and a capacitive coupling strength of the dielectric filter is associated with a size of the interval.

19. The base station according to claim 18, wherein an inner surface of each slot is covered with the metal layer.

20. The base station according to claim 18, wherein the inner edge of the first partition ring and an edge of an opening of the via hole are disposed at intervals.

21. The base station according to claim 18, wherein a center line of the first partition ring coincides with an axis of the via hole.