Syndrome-based decoding method and apparatus for block turbo code

• US 11,165,439 B2
• Filed: 10/17/2019
• Issued: 11/02/2021
• Est. Priority Date: 10/26/2018
• Status: Active Grant

• Current Assignee: Korea University Research and Business Foundation
• Original Assignee: Korea University Research and Business Foundation
• Inventors: Heo, Jun, Ahn, Byungkyu, Yoon, Sung Sik
• Primary Examiner(s): Kerveros, James C
• Application Number:
  US16/655,528
• Publication Number:
  US 20200136649A1
• Time in Patent Office: 747 Days
• Field of Search: 714752
• CPC Class Codes: H03M 13/1108 Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping
• CPC Class Codes: H03M 13/1174 Parity-check or generator matrices built from sub-matrices representing known block codes such as, e.g. Hamming codes, e.g. generalized LDPC codes
• CPC Class Codes: H03M 13/1575 Direct decoding, e.g. by a direct determination of the error locator polynomial from syndromes and subsequent analysis or by matrix operations involving syndromes, e.g. for codes with a small minimum Hamming distance
• CPC Class Codes: H03M 13/19 Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
• CPC Class Codes: H03M 13/258 with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
• CPC Class Codes: H03M 13/2948 Iterative decoding H03M13/2957 takes precedence
• CPC Class Codes: H03M 13/2963 Turbo-block codes, i.e. turbo codes based on block codes, e.g. turbo decoding of product codes
• CPC Class Codes: H03M 13/3707 Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code
• CPC Class Codes: H03M 13/618 Shortening and extension of codes
• CPC Class Codes: H03M 13/6502 Reduction of hardware complexity or efficient processing

Abstract

A syndrome-based decoding method and apparatus for a block turbo code are disclosed. An embodiment of the present invention provides a syndrome-based decoding method for a block turbo code that includes an extended Hamming code as a component code, where the decoding method includes: (a) generating an input information value for a next half iteration by using channel passage information and the extrinsic information and reliability factor of a previous half iteration; (b) generating a hard decision word by way of a hard decision of the input information value; (c) calculating an n number of 1-bit syndromes, which corresponds to the number of columns or rows of the block turbo code, by using the hard decision word; and (d) determining whether or not to proceed with the next half iteration by using the calculated n number of 1-bit syndromes.

Claims

1. A syndrome-based decoding method for a block turbo code in a decoder, the block turbo code having an extended Hamming code as a component code thereof, the decoding method comprising:

(a) receiving an input information value according to a result of (m−

1)^th half iteration decoding;

(b) generating a hard decision word by way of a hard decision of the input information value;

(c) calculating an n number of 1-bit syndromes by using the hard decision word, the n number of 1-bit syndromes corresponding to a number of columns or rows of the block turbo code;

(d) determining whether or not to proceed with m^th half iteration by using the calculated n number of 1-bit syndromes; and

(e) determining whether or not to apply hard-input soft-output based decoding,

wherein said step (d) comprises;

calculating syndromes of n−

k−

1 bits for rows or columns of the block turbo code by multiplying the input information value with a parity check matrix if the n number of 1-bit syndromes are all 0; and

determining whether or not the calculated (n−

k−

1)-bit syndromes are all 0,

and wherein a next half iteration is performed if any one of the (n−

k−

1)-bit syndromes is not 0,

wherein, if the n number of 1-bit syndromes calculated in said step (c) are all 1, then said step (e) determines whether or not to apply hard-input soft-output based decoding in the next half iteration according to whether or not there are two errors in the previous half iteration,

wherein said step (e) comprises;

if there are two errors included in the previous half iteration, identifying positions of three bits of lowest reliability and a bit corrected by a hard-input soft-output based decoding, and comparing a sum of reliability values of the three bits of lowest reliability with a reliability value of the bit corrected by the hard-input soft-output based decoding to decide whether or not to perform the hard-input soft-output based decoding,

wherein said step (e) comprises;

if a result of calculating the syndromes for the input information value includes two errors, deciding whether or not to perform a hard-input soft-output based decoding by checking whether or not reliability values of two bits having lowest reliability and of bits corrected by the hard-input soft-output based decoding match each other.

2. The decoding method of claim 1, wherein the hard decision word is a 1 by n matrix, and the 1-bit syndromes are calculated by multiplying the hard decision word with an n by 1 matrix having all values of 1.

3. The decoding method of claim 1, wherein said step (c) to said step (d) are performed sequentially for all of the rows or columns.

4. A syndrome-based decoding apparatus for a block turbo code, the block turbo code having an extended Hamming code as a component code thereof, the decoding apparatus comprising:

a processor; and

a memory connected to the processor,

wherein the memory stores program instructions executable by the processor to;

(a) receiving an input information value according to a result of (m−

1)^th half iteration decoding;

(b) generate a hard decision word by way of a hard decision of the input information value;

(c) calculate an n number of 1-bit syndromes by using the hard decision word, the n number of 1-bit syndromes corresponding to a number of columns or rows of the block turbo code;

(d) determine whether or not to proceed with m^th half iteration by using the calculated n number of 1-bit syndromes; and

(e) determining whether or not to apply hard-input soft-output based decoding,

wherein said step (d) comprises;

calculating syndromes of n−

k−

1 bits for rows or columns of the block turbo code by multiplying the input information value with a parity check matrix if the n number of 1-bit syndromes are all 0; and

determining whether or not the calculated (n−

k−

1)-bit syndromes are all 0,

and wherein a next half iteration is performed if any one of the (n−

k−

1)-bit syndromes is not 0,

wherein, if the n number of 1-bit syndromes calculated in said step (c) are all 1, then said step (e) determines whether or not to apply hard-input soft-output based decoding in the next half iteration according to whether or not there are two errors in the previous half iteration,

wherein said step (e) comprises;

if there are two errors included in the previous half iteration, identifying positions of three bits of lowest reliability and a bit corrected by a hard-input soft-output based decoding, and comparing a sum of reliability values of the three bits of lowest reliability with a reliability value of the bit corrected by the hard-input soft-output based decoding to decide whether or not to perform the hard-input soft-output based decoding,

wherein said step (e) comprises;

if a result of calculating the syndromes for the input information value includes two errors, deciding whether or not to perform a hard-input soft-output based decoding by checking whether or not reliability values of two bits having lowest reliability and of bits corrected by the hard-input soft-output based decoding match each other.