Unified accelerator for classical and post-quantum digital signature schemes in computing environments
First Claim
1. At least one non-transitory machine-readable medium comprising instructions which, when executed by a computing device, cause the computing device to perform operations comprising:
- unifying classical cryptography and post-quantum cryptography through a unified hardware accelerator hosted by a trusted platform of the computing device;
facilitating unification of a first finite state machine associated with the classical cryptography and a second finite state machine associated with the post-quantum cryptography using one or more of a hash engine, a set of register file banks, and a modular exponentiation engine, wherein the hash engine, the set of register file banks, and the module exponentiation engine are allowed direct memory access;
computing a bitmask based on an address and a seed and writing the bitmask to a first bank of the set of register file banks using the hash engine;
computing a key based on the address and the seed and writing the key to a second bank of the set of register file banks using the hash engine;
fetching a first hash function from a third bank of the set of register file banks and adding the first hash function to the bitmask in the first bank; and
appending results of the addition of the first hash function to the bitmask to the key.
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Accused Products
Abstract
A mechanism is described for facilitating unified accelerator for classical and post-quantum digital signature schemes in computing environments. A method includes unifying classical cryptography and post-quantum cryptography through a unified hardware accelerator hosted by a trusted platform of the computing device. The method may further include facilitating unification of a first finite state machine associated with the classical cryptography and a second finite state machine associated with the post-quantum cryptography though one or more of a single the hash engine, a set of register file banks, and a modular exponentiation engine.
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Citations
11 Claims
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1. At least one non-transitory machine-readable medium comprising instructions which, when executed by a computing device, cause the computing device to perform operations comprising:
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unifying classical cryptography and post-quantum cryptography through a unified hardware accelerator hosted by a trusted platform of the computing device; facilitating unification of a first finite state machine associated with the classical cryptography and a second finite state machine associated with the post-quantum cryptography using one or more of a hash engine, a set of register file banks, and a modular exponentiation engine, wherein the hash engine, the set of register file banks, and the module exponentiation engine are allowed direct memory access; computing a bitmask based on an address and a seed and writing the bitmask to a first bank of the set of register file banks using the hash engine; computing a key based on the address and the seed and writing the key to a second bank of the set of register file banks using the hash engine; fetching a first hash function from a third bank of the set of register file banks and adding the first hash function to the bitmask in the first bank; and appending results of the addition of the first hash function to the bitmask to the key. - View Dependent Claims (2, 3, 4)
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5. A method comprising:
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unifying classical cryptography and post-quantum cryptography through a unified hardware accelerator hosted by a trusted platform of the computing device; facilitating unification of a first finite state machine associated with the classical cryptography and a second finite state machine associated with the post-quantum cryptography using one or more of a hash engine, a set of register file banks, and a modular exponentiation engine, wherein the hash engine, the set of register file banks, and the module exponentiation engine are allowed direct memory access; computing a bitmask based on an address and a seed and writing the bitmask to a first bank of the set of register file banks using the hash engine; computing a key based on the address and the seed and writing the key to a second bank of the set of register file banks using the hash engine; fetching a first hash function from a third bank of the set of register file banks and adding the first hash function to the bitmask in the first bank; and appending results of the addition of the first hash function to the bitmask to the key. - View Dependent Claims (6, 7, 8)
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9. An apparatus comprising:
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one or more processors to; unify classical cryptography and post-quantum cryptography through a unified hardware accelerator hosted by a trusted platform of the computing device; facilitate unification of a first finite state machine associated with the classical cryptography and a second finite state machine associated with the post-quantum cryptography using one or more of a hash engine, a set of register file banks, and a modular exponentiation engine, wherein the hash engine, the set of register file banks, and the module exponentiation engine are allowed direct memory access; compute a bitmask based on an address and a seed and writing the bitmask to a first bank of the set of register file banks using the hash engine; compute a key based on the address and the seed and writing the key to a second bank of the set of register file banks using the hash engine; fetch a first hash function from a third bank of the set of register file banks and adding the first hash function to the bitmask in the first bank; and append results of the addition of the first hash function to the bitmask to the key. - View Dependent Claims (10, 11)
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Specification