Intelligent binning for electrically repairable semiconductor chips

• US 20010001326A1
• Filed: 01/10/2001
• Published: 05/17/2001
• Est. Priority Date: 08/02/1996
• Status: Active Grant

• Current Assignee: Brett M. Debenham
• Original Assignee: Brett M. Debenham
• Inventors: Debenham, Brett M.
• Granted Patent: US 6,321,353 B2
• Time in Patent Office: Days
• US Class Current: 714/724
• CPC Class Codes: G01R 31/01 Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass production; Testing objects at points as they pass through a testing station testing of cables continuously passing the testing apparatus G01R31/59; testing dielectric strength or breakdown voltage G01R31/12
• CPC Class Codes: G01R 31/2851 Testing of integrated circuits [IC] G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801
• CPC Class Codes: G01R 31/31718 Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis mechanical aspects G01R31/2808, G01R31/2851
• CPC Class Codes: G01R 31/319 Tester hardware, i.e. output processing circuits
• CPC Class Codes: G11C 29/44 Indication or identification of errors, e.g. for repair
• CPC Class Codes: G11C 29/56 External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Abstract

The present invention relates to a system and method for testing one or more semiconductor devices (e.g., packaged chips). Test equipment performs at least tests of a first type on the semiconductor device and identifies failures in the semiconductor device, if any. A number of failures is determined. In the case where there are some failures, decision circuitry determines whether it is more efficient to repeat the tests or repair the semiconductor device, if it is repairable.

Claims

1. A test system for testing semiconductor devices comprising:

testing apparatus for performing at least one test of a first type on at least one semiconductor device to identify one or more types of failure in the at least one semiconductor device;

processing circuitry for communicating with the testing apparatus and for determining at least one type of failure of a number of types of failures, said processing circuitry providing at least one signal indicative of the at least one type of failure;

decision circuitry for receiving the at least one signal indicative of the at least one type of failure of a number of types of failures and for considering the at least one type of failure of a number of types of failures of one of designating the at least one semiconductor device for an additional procedure, designating the at least one semiconductor device for repair, and designating the at least one semiconductor device for additional tests of the first type, said decision circuitry designating the at least one semiconductor device for the additional procedure if the at least one type of failure of a number of the identified types of failures is within a first number set; and

designating the at least one semiconductor device for repair if the number of the identified types of failures is within a second number set.

2. The system of

claim 1

, wherein the at least one semiconductor device is a first semiconductor device and a support supports other semiconductor devices tested by the test equipment.

3. The system of

claim 1

, wherein the decision circuitry designates the at least one semiconductor device for the additional tests of the first type if the number of the identified types of failures is within a third number set.

4. The system of

claim 3

, wherein the first number set includes only zero, the second number set includes numbers greater than zero and less than a threshold, and the third number set includes numbers equal to or greater than the threshold.

5. The system of

claim 3

, wherein the at least one semiconductor device is rejected if the number of the identified types of failures is within the second number set and the at least one semiconductor device is not repairable.

6. The system of

claim 1

, wherein the processing circuitry is located proximate to the test equipment.

7. The system of

claim 1

, wherein the processing circuitry is located remote from test equipment.

8. The system of

claim 1

, further comprising:

a pass bin into which the at least one semiconductor device is relocated if the at least one semiconductor device is designated for the additional procedure; and

a repair bin into which the at least one semiconductor device is relocated if the at least one semiconductor device is designated for repair.

9. The system of

claim 8

, further comprising:

a reject bin into which the at least one semiconductor device is relocated if it is determined to be non-repairable.

10. The system of

claim 1

, further comprising:

a system controller including decision circuitry; and

a repair station controlled by the decisions circuitry of the system controller.

11. The system of

claim 1

, further comprising:

a repair station, and wherein subsequent to the decision circuitry designating the at least one semiconductor device for repair, the decision circuitry determines whether the at least one semiconductor device is repairable and, if the at least one semiconductor device is repairable, the repair station repairs the at least one semiconductor device.

12. The system of

claim 1

, wherein the test equipment includes repair circuitry for performing a repair on the at least one semiconductor device when the at least one semiconductor device is designated for repair and is determined to be repairable.

13. The system of

claim 1

, wherein the at least one semiconductor device is binned based upon the number of identified types of failures.

14. The system of

claim 1

, wherein the identified types of failures include failures of different classes, and in which the number of types of identified types of failures is a number of total failures of all classes, and the decision circuitry considers failures of different classes in determining whether to designate the at least one semiconductor device for the additional procedure, designate the at least one semiconductor device for repair, or perform additional tests of the first type.

15. The system of

claim 1

, wherein the tests of the first type detects certain defects in the at least one semiconductor device which are not classified as examples of the types of failures and, therefore, do not contribute to the number of the identified types of failures.

16. The system of

claim 1

, wherein the additional procedure includes transporting the at least one semiconductor device to a predetermined location.

17. The system of

claim 1

, further comprising:

a temperature regulated chamber in which the tests of the first type are performed.

18. The system of

claim 1

, further comprising:

a first temperature regulated chamber in which the tests of the first type are performed; and

a second temperature regulated chamber in which the additional procedure is performed.

19. The system of

claim 1

, wherein the test equipment includes probes, and electrical connection is made between the probes and the at least one semiconductor device.

20. The system of

claim 2

, wherein the at least one semiconductor device includes leads and the support includes sockets for receiving the leads, an electrical connection being made between the test equipment and the sockets.

21. The system of

claim 1

, wherein the tests of the first type include:

subjecting the at least one semiconductor device to various temperatures in a first range of temperatures while monitoring electrical signals on the at least one semiconductor device; and

the additional procedure includes subjecting the at least one semiconductor device to various temperatures in a second range of temperatures while monitoring electrical signals on the at least one semiconductor device.

22. The system of

claim 21

, wherein the temperatures of the first range of temperatures and the second range of temperatures include are substantially distinct ranges.

23. The system of

claim 1

, wherein the at least one semiconductor device comprises a chip in wafer form.

24. The system of

claim 1

, wherein the at least one semiconductor device comprises a packaged chip including a package and leads.

25. The system of

claim 1

, wherein tests of the first type and the additional tests of the first type are both of the first type, but not identical.

26. The system of

claim 3

, wherein the additional tests of the first type are performed, failures in the at least one semiconductor device are re-identified and a number of re-identified types of failures are determined, with the decision circuitry subsequently:

designating the at least one semiconductor device for the additional procedure when the number of the re-identified types of failures is within a fourth number set;

designating the at least one semiconductor device for repair when the number of the re-identified types of failures is within a fifth number set;

designating the at least one semiconductor device for additional tests of the first type when the number of the re-identified types of failures is within a sixth number set; and

wherein the decision circuitry repeats such designations until alternately the number of the re-identified types of failures is within the fourth number set, the at least one semiconductor device is repairable and the number of the re-identified types of failures is within the fifth number set, or the additional tests of the first type have been performed a predetermined number of times and the number of re-identified types of failures is within the sixth number set.

27. The system of

claim 26

, wherein the values of the fifth and sixth number sets change.

28. The system of

claim 25

, wherein the additional procedure performed by the decision circuitry includes:

designating the at least one semiconductor device for tests of a second type to re-identify types of failures in the at least one semiconductor device and determine a number of re-identified types of failures;

designating the at least one semiconductor device for a further procedure when the number of the re-identified types of failures is within a seventh number set;

designating the at least one semiconductor device for repair when the number of the re-identified types of failures is within an eighth number set; and

the test equipment performing additional tests of the second type on the at least one semiconductor device when the number of the identified failures is within a ninth number set.

29. The system of

claim 28

, wherein the tests of the first type are performed in a first temperature regulated chamber and wherein the tests of the second type are performed in the first temperature regulated chamber.

30. The system of

claim 1

, wherein the decision circuitry includes:

a testing controller to control the tests of the first type; and

a data analyzer receiving data from the tests of the first type and determining one of designating the at least one semiconductor device for the additional procedure, designating the at least one semiconductor device for repair, and performing additional tests of the first type on the at least one semiconductor device.

31. The system of

claim 30

, wherein the testing controller and the data analyzer are remotely located from each other.

32. A test system for testing at least one semiconductor device comprising:

test apparatus for performing tests of a first type on the at least one semiconductor device, for identifying failures in the at least one semiconductor device, and determining at least one failure of the number of identified failures, the test apparatus performing one of;

designating the at least one semiconductor device for an additional procedure when the number of the identified types of failures is within a first number set;

designating the at least one semiconductor device for repair when the number of the identified types of failures is within a second number set; and

designating the at least one semiconductor device for additional tests of the first type when the number of the identified types of failures is within a third number set.

33. A test system for testing at least one semiconductor device comprising:

test equipment performing at least one test of a plurality of tests of a first type on the at least one semiconductor device to identify at least one failure of a plurality of types of failures in the at least one semiconductor device;

processing circuitry communicating with the test equipment, determining at least one failure of a number of types of failures, and providing signals indicative thereof, and

decision circuitry receiving the signals indicative of at least one failure of the number of types of failures, the decision circuitry determining the number of types of failures and performing one of designating the at least one semiconductor device for an additional procedure, designating the at least one semiconductor device for repair, and designating the at least one semiconductor device for additional tests of the first type, the decision circuitry classifying failures by class and numbers of the identified types of failures, a total number of identified types of failures equaling a sum of the identified types of failures for each class, and the decision circuitry considering the total number of identified types of failures and the number of identified types of failures in at least one of the classes of a plurality of types of failures.

34. A test system for testing at least one semiconductor device comprising:

test equipment connected to the at least one semiconductor device performing tests of a first type on the at least one semiconductor device for identifying at least one failure of a plurality of types of failures in the at least one semiconductor device;

processing circuitry communicating with the test equipment determining a total number of identified types of failures and classifying the identified failures by a class and a number for each class determined, the total number of identified types of failures equaling a sum of the identified types of failures for each class; and

decision circuitry designating the at least one semiconductor device for an additional procedure when the total number of the identified types of failures is within a first number set, the decision circuitry designating the at least one semiconductor device for repair when the total number of identified types of failures is within a second number set and the number of identified failures in a predetermined class is not within an auxiliary number set, and the decision circuitry performing additional tests of the first type on the at least one semiconductor device when one of the total number of the identified types of failures is within a third number set and the number of identified types failures in the predetermined class is within the auxiliary number set.

35. A method for testing at least one semiconductor device comprising:

performing tests of a first type on at least one semiconductor device to identify types of failures in the at least one semiconductor device;

determining the number of identified types of failures;

designating the at least one semiconductor device having at least one identified type of failure for an additional procedure when the number of the identified types of failures is within a first number set;

determining if the number of identified types of failures is within a second number set;

repairing the at least one semiconductor device when the number of the identified types of failures is within the second number set; and

performing other tests of the first type on the at least one semiconductor device when the number of the identified types of failures is within a third number set.

36. The method of

claim 35

, further comprising the step of:

determining when the at least one semiconductor device is repairable.

37. The method of

claim 35

, wherein the additional tests of the first type are performed, types of failures in the at least one semiconductor device are re-identified and the number of re-identified types of failures is determined, further comprising:

designating the at least one semiconductor device being ready for the additional procedure when the number of the re-identified types of failures is within a fourth number set;

repairing the at least one semiconductor device when the number of the re-identified types of failures is within a fifth number set;

performing the additional tests of the first type on the at least one semiconductor device when the number of the re-identified types of failures is within a sixth number set; and

wherein designating, repairing, and performing are repeated until one of the number of the re-identified types of failures is within the fourth number set, the at least one semiconductor device is repairable and the number of the re-identified failures is within the fifth number set, and the additional tests of the first type have been performed a predetermined number of times and the number of re-identified types of failures is within the sixth number set.

38. The method of

claim 37

, wherein the tests of the first type and the additional tests of the first type are each substantially performed in a first temperature regulated chamber.

39. The method of

claim 37

, wherein the additional procedure includes:

performing tests of a second type on the at least one semiconductor device re-identifying types of failures in the at least one semiconductor device and determining a number of types of re-identified failures;

designating the at least one semiconductor device for a further procedure when the number of the re-identified types of failures is within a seventh number set;

repairing the at least one semiconductor device when the number of the re-identified types of failures is within an eighth number set; and

performing additional tests of the second type on the at least one semiconductor device when the number of the identified types of failures is within a ninth number set.

40. The method of

claim 39

, wherein the seventh, eighth, and ninth number sets are substantially identical to the first, second, and third number sets, respectively.

41. The method of

claim 39

, wherein the tests of a first type include a hot sort procedure and wherein the tests of a second type include a cold final procedure.