Discharge control circuit of batteries

• US 20010017534A1
• Filed: 01/26/2001
• Published: 08/30/2001
• Est. Priority Date: 02/29/2000
• Status: Active Grant

• Current Assignee: Celebration IP LLC (IP Edge LLC)
• Original Assignee: Fujitsu Limited
• Inventors: Matsumoto, Takashi, Haraguchi, Akira
• Granted Patent: US 6,346,795 B2
• Time in Patent Office: Days
• US Class Current: 320/134
• CPC Class Codes: H02J 7/00306 Overdischarge protection
• CPC Class Codes: H02J 7/0031 using battery or load disconnect circuits H02J9/002 takes precedence

Abstract

A discharge control circuit that securely prevents an over discharge of a battery. The control circuit includes a discharge control switch connected to the battery for cutting off a discharge current of the battery in response to a discharge stop signal. A control circuit is connected to the battery and the discharge control switch generates the discharge stop signal for deactivating the discharge control switch when a voltage of at least one cell reaches a lower limit. The control circuit includes a switch holding circuit for continuously supplying the discharge stop signal to the discharge control switch for a predetermined time after the discharge stop signal is generated regardless of the cell voltage.

Claims

1. A discharge control circuit for controlling discharge of a battery including at least one cell comprising:

a discharge control switch connected to the battery for cutting off a discharge current of the battery in response to a discharge stop signal; and

a control circuit connected to the battery and the discharge control switch for generating the discharge stop signal that deactivates the discharge control switch when a voltage of at least one cell reaches a lower limit, wherein the control circuit includes a switch holding circuit for continuously supplying the discharge stop signal to the discharge control switch for a predetermined time after the discharge stop signal is generated.

2. The discharge control circuit according to

claim 1

, wherein the control circuit comprises:

a bias generating circuit for generating a bias voltage; and

a bias voltage control circuit connected to the bias generating circuit for stopping the bias generating circuit to generate the bias voltage on the basis of the discharge stop signal and an output voltage of the discharge control switch after cutting off the discharge current.

3. The discharge control circuit according to

claim 1

, wherein the control circuit generates the discharge stop signal in response to a power down signal.

4. A discharge control circuit for controlling discharge of a battery including at least one cell comprising:

a discharge control switch connected to the battery for cutting off a discharge current of the battery in response to a discharge stop signal;

a cell voltage detecting circuit connected to the battery for generating a cell voltage detection signal when a voltage of at least one cell reaches a lower limit;

a delay time setting circuit connected to the cell voltage detecting circuit for generating the discharge stop signal after a first predetermined time from the moment that the cell voltage detection signal is generated; and

a latch circuit connected to the delay time setting circuit for latching the discharge stop signal and supplying the discharge control switch with the latched discharge stop signal, wherein the delay time setting circuit includes a switch holding circuit for invalidating the cell voltage detection signal for a second predetermined time after the latched discharge stop signal is supplied and continuously supplying the latched discharge stop signal for the second predetermined time.

5. The discharge control circuit according to

claim 4

, wherein the delay time setting circuit includes a charge circuit for generating a charged voltage in response to the cell voltage detection signal to perform a charging operation, and the switch holding circuit includes:

a hysteresis buffer connected to the charge circuit for generating the discharge stop signal in accordance with the charged voltage; and

a discharge circuit connected to the hysteresis buffer for decreasing the charged voltage in response to the discharge stop signal.

6. The discharge control circuit according to

claim 5

, wherein the hysteresis buffer has a first threshold applied during the rising of the charged voltage and a second threshold applied during the falling of the charged voltage, and wherein the second threshold is lower than the first threshold.

7. The discharge control circuit according to

claim 6

, wherein the discharge stop signal is supplied to the cell voltage detecting circuit as an invalid signal for invalidating the cell voltage detection signal.

8. The discharge control circuit according to

claim 4

, wherein the control circuit comprises:

a bias generating circuit connected to the cell voltage detecting circuit and the delay time setting circuit for generating a bias voltage supplied to the cell voltage detecting circuit and the delay time setting circuit; and

a bias voltage control circuit connected to the bias generating circuit for stopping the bias generating circuit to generate the bias voltage on the basis of the discharge stop signal and an output voltage of the discharge control switch after cutting off the discharge current.

9. The discharge control circuit according to

claim 4

, wherein the cell voltage detecting circuit generates the cell voltage detection signal in response to a power down signal.

10. The discharge control circuit according to

claim 9

, wherein the delay time setting circuit generates the discharge stop signal in response to the power down signal, after a time shorter than the first predetermined time.

11. A discharge control circuit for controlling discharge of a battery including at least one cell comprising:

a discharge control switch connected to the battery for cutting off a discharge current of the battery in response to a discharge stop signal;

a cell voltage detecting circuit connected to the battery for generating a cell voltage detection signal when a voltage of at least one cell reaches a lower limit;

a delay time setting circuit connected to the cell voltage detecting circuit for generating the discharge stop signal after a first predetermined time from the moment that the cell voltage detection signal is generated;

a first latch circuit connected to the delay time setting circuit for latching the discharge stop signal and supplying the discharge control switch with the latched discharge stop signal; and

a second latch circuit connected to the first latch circuit for performing a set operation in response to the latched discharge control signal and invalidating a reset operation of the first latch circuit for a second predetermined time after the latched discharge stop signal is supplied.

12. The discharge control circuit according to

claim 11

, wherein the control circuit comprises:

a bias generating circuit connected to the cell voltage detecting circuit and the delay time setting circuit for generating a bias voltage supplied to the cell voltage detecting circuit and the delay time setting circuit; and

a bias voltage control circuit connected to the bias generating circuit for stopping the bias generating circuit to generate the bias voltage on the basis of the discharge stop signal and an output voltage of the discharge control switch after cutting off the discharge current.

13. The discharge control circuit according to

claim 11

, wherein the first latch circuit supplies the discharge control switch with the latched discharge stop signal in response to a power down signal.