Integrated inductor

• US 20010030591A1
• Filed: 01/19/2001
• Published: 10/18/2001
• Est. Priority Date: 11/23/1999
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Gardner, Donald S.
• Granted Patent: US 6,856,228 B2
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 2017/0046 with a conductive path having a bridge
• CPC Class Codes: H01F 2017/008 Electric or magnetic shielding of printed inductances
• CPC Class Codes: H01F 41/042 by thin film techniques
• CPC Class Codes: H01F 41/046 structurally combined with ferromagnetic material
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 29/4902 Electromagnet, transformer or inductor
• CPC Class Codes: Y10T 29/49032 Fabricating head structure or component thereof
• CPC Class Codes: Y10T 29/49043 Depositing magnetic layer or coating
• CPC Class Codes: Y10T 29/49044 Plural magnetic deposition layers
• CPC Class Codes: Y10T 29/49048 Machining magnetic material [e.g., grinding, etching, polishing]
• CPC Class Codes: Y10T 29/49052 by etching
• CPC Class Codes: Y10T 29/49073 by assembling coil and core
• CPC Class Codes: Y10T 29/49075 : including permanent magnet or core
• CPC Class Codes: Y10T 29/49078 : Laminated
• CPC Class Codes: Y10T 29/49156 : with selective destruction of conductive paths

Abstract

An inductor comprises a substrate comprising a semiconductor material, a first dielectric layer over the substrate, a magnetic layer over the first dielectric layer, a second dielectric layer over the magnetic layer, and a conductor over the second dielectric layer.

Claims

1. An inductor comprising:

a substrate comprising a semiconductor material;

a first dielectric layer over the substrate;

a magnetic layer over the first dielectric layer;

a second dielectric layer over the magnetic layer; and

a conductor over the second dielectric layer.

2. The inductor of

claim 1

, wherein the magnetic layer comprises cobalt.

3. The inductor of

claim 1

, wherein the magnetic layer comprises an amorphous alloy comprising cobalt.

4. The inductor of

claim 1

, wherein the magnetic layer comprises an amorphous alloy comprising cobalt and zirconium.

5. The inductor of

claim 1

, wherein the magnetic layer comprises an amorphous alloy comprising cobalt;

zirconium; and

tantalum, niobium, rhenium, or a rare earth element.

6. The inductor of

claim 1

, wherein the magnetic layer defines at least one slot.

7. The inductor of

claim 1

, comprising:

a third dielectric layer over the conductor; and

another magnetic layer over the third dielectric layer.

8. The inductor of

claim 7

, wherein the other magnetic layer defines at least one slot.

9. The inductor of

claim 7

, wherein the magnetic layers are connected.

10. The inductor of

claim 1

, wherein the conductor defines a generally spiral-shaped signal path having at least one turn.

11. The inductor of

claim 1

, wherein the first dielectric layer and the magnetic layer define one or more trenches and wherein the conductor defines a signal path along the one or more trenches.

12. An inductor comprising:

a substrate comprising a semiconductor material;

a first dielectric layer over the substrate;

a conductor over the first dielectric layer;

a second dielectric layer over the conductor; and

a magnetic layer over the second dielectric layer, wherein the magnetic layer comprises cobalt.

13. The inductor of

claim 12

, wherein the magnetic layer comprises an amorphous alloy comprising cobalt.

14. The inductor of

claim 12

, wherein the magnetic layer comprises an amorphous alloy comprising cobalt and zirconium.

15. The inductor of

claim 12

, wherein the magnetic layer comprises an amorphous alloy comprising cobalt;

zirconium; and

tantalum, niobium, rhenium, or a rare earth element.

16. The inductor of

claim 12

, wherein the magnetic layer defines at least one slot.

17. The inductor of

claim 12

, wherein the conductor defines a generally spiral-shaped signal path having at least one turn.

18. The inductor of

claim 12

, wherein the first dielectric layer defines one or more trenches and wherein the conductor defines a signal path along the one or more trenches.

19. A method comprising:

forming a first dielectric layer over a substrate comprising a semiconductor material;

forming a magnetic layer over the first dielectric layer;

forming a second dielectric layer over the magnetic layer; and

forming a conductor over the second dielectric layer.

20. The method of

claim 19

, wherein the forming the magnetic layer comprises forming a magnetic layer comprising cobalt.

21. The method of

claim 19

, wherein the forming the magnetic layer comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt.

22. The method of

claim 19

, wherein the forming the magnetic layer comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt and zirconium.

23. The method of

claim 19

, wherein the forming the magnetic layer comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt;

zirconium; and

tantalum, niobium, rhenium, or a rare earth element.

24. The method of

claim 19

, comprising patterning the magnetic layer to define at least one slot.

25. The method of

claim 19

, comprising:

forming a third dielectric layer over the conductor; and

forming another magnetic layer over the third dielectric layer.

26. The method of

claim 25

, comprising patterning the other magnetic layer to define at least one slot.

27. The method of

claim 25

, comprising connecting the magnetic layers.

28. The method of

claim 19

, comprising patterning the conductor to define a generally spiral-shaped signal path having at least one turn.

29. The method of

claim 19

, comprising patterning the first dielectric layer and the magnetic layer to define one or more trenches such that the conductor defines a signal path along the one or more trenches.

30. A method comprising:

forming a first dielectric layer over a substrate comprising a semiconductor material;

forming a conductor over the first dielectric layer;

forming a second dielectric layer over the conductor; and

forming a magnetic layer over the second dielectric layer, wherein the magnetic layer comprises cobalt.

31. The method of

claim 30

, wherein the forming the magnetic layer comprises forming a magnetic layer comprising cobalt.

32. The method of

claim 30

, wherein the forming the magnetic layer comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt.

33. The method of

claim 30

, wherein the forming the magnetic layer comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt and zirconium.

34. The method of

claim 30

, wherein the forming the magnetic layer comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt;

zirconium; and

tantalum, niobium, rhenium, or a rare earth element.

35. The method of

claim 30

, comprising patterning the magnetic layer to define at least one slot.

36. The method of

claim 30

, comprising patterning the conductor to define a generally spiral-shaped signal path having at least one turn.

37. The method of

claim 30

, comprising patterning the first dielectric layer to define one or more trenches such that the conductor defines a signal path along the one or more trenches.