Automatic selection mechanism of external flash ROM or internal mask ROM

• US 20010040750A1
• Filed: 03/27/2001
• Published: 11/15/2001
• Est. Priority Date: 03/28/2000
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Murakami, Masayuki, Takase, Yasuhiro, Sakai, Tatsuya
• Granted Patent: US 6,912,101 B2
• Time in Patent Office: Days
• US Class Current: 360/69
• CPC Class Codes: G06F 3/0607 by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
• CPC Class Codes: G06F 3/0635 by changing the path, e.g. traffic rerouting, path reconfiguration
• CPC Class Codes: G06F 3/0676 Magnetic disk device
• CPC Class Codes: G06F 9/4403 Processor initialisation

Abstract

The present invention is a semiconductor device that includes a DRAM and an internal mask ROM that are implemented on a single integrated circuit substrate. The semiconductor further includes a terminal coupled to an external ROM and a selector for choosing an external ROM or an internal mask ROM for program code loading. If an external ROM is coupled to the aforementioned terminal, the external ROM is given precedence for use in the loading of the aforementioned program code. The control method of the present invention pertains to a semiconductor device including a DRAM, an internal mask ROM, a terminal coupled to an external ROM, a selector for choosing the first path led from the internal mask ROM or the second path led from the terminal, and a coupling determiner deciding whether or not the terminal is coupled to the external ROM. The control method includes the steps of: (a) deciding whether or not the terminal is coupled to the external ROM; (b) selecting a first path when a terminal is not coupled to the external ROM or a second path when the terminal is coupled to the external ROM; and (c) loading a program code from either the internal mask ROM or the external ROM.

Claims

1. A semiconductor device including a dynamic random access memory (DRAM) and an internal mask read-only memory (ROM) implemented on a single integrated circuit substrate, comprising:

a terminal coupled to an external ROM; and

a loading selector for selecting a source for loading a program code, wherein said source is either said external ROM or said internal mask ROM, wherein loading of said program code from said external ROM takes precedence when said external ROM is coupled to said terminal.

2. The semiconductor device according to

claim 1

, wherein said loading selector comprises:

a coupling determiner for deciding whether or not said terminal is coupled to said external ROM; and

a path selector for selecting either said terminal or said internal mask ROM, said path selector selects a path according to the decision of said coupling determiner so that a first path leading to said internal mask ROM is selected when a signal received from said coupling determiner denotes that said terminal is not coupled to said external ROM and a second path leading to said terminal is selected when said signal denotes that said terminal is coupled to said external ROM.

3. The semiconductor device according to

claim 2

, wherein said coupling determiner further comprises:

a comparator, wherein said comparator outputs a signal for denoting that said path selector should select said first path when a single-byte input from said terminal is “

00”

(hexadecimal) or “

FF”

(hexadecimal) and outputs a signal for denoting said path selector should select said second path when said single-byte input is neither “

00”

(hexadecimal) nor “

FF”

(hexadecimal) when said terminal is coupled to either a ground potential or a low level potential, or to either a power supply potential or a high level potential.

4. The semiconductor device according to

claim 3

, wherein said DRAM stores said program code.

5. The semiconductor device according to

claim 3

, wherein said semiconductor device further comprises:

second random access memory (RAM) other than said DRAM coupled to an arithmetic circuit via a bus, said second RAM stores said program code.

6. The semiconductor device according to

claim 3

, wherein said semiconductor device further comprises:

a drive interface that couples said semiconductor device to a hard disk drive and relays data; and

a host interface that couples said semiconductor device to a host computer and relays data, said semiconductor device is utilized as a hard disk controller.

7. A method for controlling a semiconductor device that includes a DRAM, an internal mask ROM, a terminal coupled to an external ROM, a path selector, and a coupling determiner, said method comprising the steps of:

deciding whether or not said terminal is coupled to said external ROM;

selecting a first path when said terminal is not coupled to said external ROM and selecting a second path when said terminal is coupled to said external ROM; and

loading a program code from either said internal mask ROM or said external ROM.

8. The method for controlling a semiconductor device according to

claim 7

, wherein said step of deciding whether or not said terminal is coupled to said external ROM including the steps of:

relaying single-byte data received from said terminal to a comparator, wherein said terminal is coupled to either a ground potential or a low level potential, or to either a power supply potential or a high level potential;

comparing said single-byte input with “

FF”

(hexadecimal) or “

00”

(hexadecimal).

9. The method for controlling a semiconductor device according to

claim 8

, wherein said step of selecting a first path when said terminal is not coupled to said external ROM and selecting a second path when said terminal is coupled to said external ROM further comprises the step of:

selecting said first path in case an output from said comparator is “

true”

or selecting said second path in case said output is “

false”

.

10. The method for controlling a semiconductor device according to

claim 9

, wherein said step of loading a program code from either said internal mask ROM or said external ROM further comprises the steps of:

enabling code data to be serially relayed from said terminal or from said internal mask ROM, then converted to plural-bit data in a serial/parallel converter and said plural-bit data to be processed in bits in parallel so as to be transferred to a memory controller.

11. The method of controlling a semiconductor device according to

claim 10

, wherein said method further comprises the step of:

converting said code data to plural-bit data in a serial/parallel converter;

processing plural-bit data in bits in parallel; and

transferring said plural-bit data to a memory controller.

12. The method for controlling a semiconductor device according to

claim 11

, said step of processing plural-bit data in bits in parallel further comprises the steps of:

processing plural-bit data in parallel; and

storing said plural-bit data in said DRAM or a second RAM other than said DRAM coupled to an arithmetic circuit via a bus.

13. A hard disk drive comprising:

a hard disk recording medium;

a medium driver;

a magnetic head located at the tip of an arm; and

a controller, which drives said medium, said arm, and transfer of data to and from said medium via said magnetic head according to a program code, wherein said controller further comprises;

a semiconductor device that includes a DRAM and an internal mask ROM implemented on a single integrated circuit substrate;

a terminal coupled to an external ROM; and

a loading selector for selecting a source for loading a program code, wherein said source is either said external ROM or said internal mask ROM, wherein loading of said program code from said external ROM takes precedence when said external ROM is coupled to said terminal.