Liquid crystal display unit having pixel electrode encircled with partition wall and process for fabrication thereof

• US 20020008829A1
• Filed: 07/10/2001
• Published: 01/24/2002
• Est. Priority Date: 07/11/2000
• Status: Active Grant

• Current Assignee: Vista Peak Ventures LLC (Dominion Harbor Enterprises, LLC)
• Original Assignee: NEC LCD Technologies Limited (NEC Corporation)
• Inventors: Matsumoto, Kimikazu
• Granted Patent: US 6,657,699 B2
• Time in Patent Office: Days
• US Class Current: 349/141
• CPC Class Codes: G02F 1/133377 Cells with plural compartments or having plurality of liquid crystal microcells partitioned by walls, e.g. one microcell per pixel
• CPC Class Codes: G02F 1/133707 Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]

Abstract

An in-plane switching type liquid crystal display unit has a matrix of pixels for producing images thereon, and each of the pixels includes a pixel electrode and a thin film transistor connected to the pixel electrode both formed in a first substrate structure, a part of a second substrate structure spaced from the first substrate structure and a piece of liquid crystal filling the gap therebetween, wherein a partition wall is formed for encircling part of said piece of liquid crystal so as to block the piece of liquid crystal from elastic influence of the remaining liquid crystal, thereby improving the response time and the threshold of the pixel.

Claims

1. An in-plane switching type liquid crystal display panel for producing images, comprising:

a pair of substrate structures opposed to each other for creating a gap therebetween;

liquid crystal filling said gap, and serving as optical elements of plural pixels where said images are produced;

each of said plural pixels including

a common electrode formed in one of the substrate structures of said pair,

a pixel electrode formed in said one of said substrate structures in an offset manner to said common electrode, and defining a zone in said liquid crystal together with said common electrode for accommodating one of said optical elements of said plural pixels therein, and

a switching transistor formed in said one of said substrate structures and having a source connected to said pixel electrode, a data line extending outside of a periphery of said zone and a gate electrode extending outside of said periphery; and

at least one partition wall structure associated with said each of said plural pixels, formed in any one of said substrate structures, and projecting into said zone for separating at least part of said one of said optical elements from the remaining liquid crystal.

2. The in-plane switching type liquid crystal display panel as set forth in claim 1, in which said at least one partition wall structure is overlapped with said common electrode.

3. The in-plane switching type liquid crystal display panel as set forth in claim 1, in which said at least one partition wall structure has plural walls spaced from one another for forming gaps thereamong.

4. The in-plane switching type liquid crystal display panel as set forth in claim 1, in which said at least one partition wall structure has a single wall encircling said part of said one of said plural optical elements therein.

5. The in-plane switching type liquid crystal display panel as set forth in claim 1, in which said at least one partition wall structure causes said substrate structures partially held in contact with one another.

6. The in-plane switching type liquid crystal display panel as set forth in claim 1, in which said at least one partition wall structure is formed of insulating material.

7. The in-plane switching type liquid crystal display panel as set forth in claim 1, in which said at least one partition wall structure is formed of conductive material.

8. The in-plane switching type liquid crystal display panel as set forth in claim 7, in which said at least one partition wall structure is connected to a source of voltage.

9. The in-plane switching type liquid crystal display panel as set forth in claim 8, in which said source of contact voltage is said common electrode.

10. The in-plane switching type liquid crystal display panel as set forth in claim 1, further comprising at least one set of color filters formed in any one of said substrate structures, different in color and associated with said one of said pixels, and one of the color filters of said set is overlapped with said one of said optical elements.

11. The in-plane switching type liquid crystal display panel as set forth in claim 10, in which said any one of said substrate structures is identical with said one of said substrate structures, and said at least one partition wall structure is formed on said at least one of said color filters.

12. The in-plane switching type liquid crystal display panel as set forth in claim 11, in which said color filters are same in material as said at least one partition wall structure.

13. A process for fabricating an in-plane switching type liquid crystal display unit, comprising the steps of:

a) preparing substrate structures one of which includes at least one partition wall structure occupying an area partially overlapped with a pixel electrode forming a part of one of plural pixels and a common electrode associated with said pixel electrode, a switching transistor connected with said pixel electrode and a data line connected to said switching transistor being located out of said area;

b) assembling said substrate structures in such a manner as to form a gap therebetween; and

c) introducing liquid crystal into said gap so that part of said liquid crystal fills a zone defined by a periphery of said at least one partition wall structure.

14. The process as set forth in claim 13, in which one of said substrate structure is fabricated through the sub-steps of

a-1) preparing a transparent substrate,

a-2) forming a gate electrode of said switching transistor and said common electrode on said transparent substrate,

a-3) covering said gate electrode and said common electrode with a first insulating layer,

a-4) forming said data line and said pixel electrode on said first insulating layer in such a manner that said switching transistor is connected to said data line and said pixel electrode,

a-5) completing said switching transistor including said gate electrode on said first insulating layer,

a-6) covering said data line, said pixel electrode and said switching transistor with a second insulating layer, and

a-7) forming said at least one partition wall structure on said second insulating layer.

15. The process as set forth in claim 13, in which said at least one partition wall structure has walls spaced from one another.

16. The process as set forth in claim 13, in which said at least one partition wall structure has a single wall formed along a periphery of said area.

17. The process as set forth in claim 13, in which said at least one partition wall structure has a height approximately equal to the distance between said substrate structure.

18. The process as set forth in claim 13, in which one of said substrate structures is fabricated through the sub-steps of

a-1) preparing a transparent substrate,

a-2) forming a gate electrode, said common electrode, said data line, another data line and said pixel electrode over said transparent substrate,

a-3) forming a first color filter in such a manner that said pixel electrode and a part of said data line and said another data line are covered with said first color filter,

a-4) forming a lower part of said at least one partition wall structure on said first color filter concurrently with a second color filter different in color from said first color filter and extending over another pixel electrode and associated data lines, and

a-5) forming a higher part of said at least one partition wall structure on said lower part concurrently with a third color filter different in color from said first and second color filter and extending over yet another pixel electrode and associated data lines.

19. The process as set forth in claim 13, in which one of said substrate structures is fabricated through the sub-steps of

a-1) preparing a transparent substrate,

a-2) forming a gate electrode and said common electrode on said transparent substrate,

a-3) covering said gate electrode and said common electrode with a first insulating layer,

a-4) forming said data line and said pixel electrode on said first insulating layer,

a-5) forming contact holes for exposing a part of said gate electrode, a part of said data line and a part of said common electrode thereto,

a-6) forming conductive terminals held in contact with said part of said gate electrode and said part of said data line, and

a-7) forming said at least one partition wall structure held in contact with said part of said common electrode.