CMOS image sensor and method of manufacture

• US 20020011611A1
• Filed: 09/25/2001
• Published: 01/31/2002
• Est. Priority Date: 07/07/2000
• Status: Abandoned Application

• Current Assignee: San-Wen Chiou, Sen-Huang Huang, Sheng-Yang Huang
• Original Assignee: San-Wen Chiou, Sen-Huang Huang, Sheng-Yang Huang
• Inventors: Huang, Sen-Huang, Huang, Sheng-Yang, Chiou, San-Wen
• Application Number:
  US09/963,201
• Publication Number:
  US 20020011611A1
• Time in Patent Office: Days
• US Class Current: 257/227
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

A CMOS image sensor structure that includes a substrate, a sensing layer and a dopant layer. The substrate is formed using a first conductive type material. The sensing region is buried within the substrate. The sensing layer is a second type conductive material layer. The dopant layer is formed above the sensing layer. The dopant layer is a first type conductive material layer.

Claims

1. A complementary metal-oxide-semiconductor (CMOS) image sensor structure, comprising:

a substrate, wherein the substrate is a first conductive type material;

a sensing region buried within the substrate, wherein the sensing region is a second conductive type material; and

a dopant region above the sensing region, wherein the dopant region is a first conductive type material.

2. The CMOS image sensor of claim 1, wherein the first conductive type material includes a P-doped material and the second conductive type material includes an N-doped material.

3. The CMOS image sensor of claim 1, wherein the first conductive type material includes an N-doped material and the second conductive type material includes a P-doped material.

4. The CMOS image sensor of claim 1, wherein the sensing region has a depth of about 0.6˜

1.5 μ

m.

5. The CMOS image sensor of claim 1, wherein the dopant region has a depth of about 0.05˜

0.2 μ

m.

6. The CMOS image sensor of claim 1, wherein the substrate further includes:

a well region in the substrate just outside the sensing region; and

an isolation region above the substrate between the sensing region and the well region.

7. The CMOS image sensor of claim 6, wherein the structure further includes:

a field effect transistor above in the well region, wherein the field effect transistor has a source/drain region;

an anti-punchthrough implant region in the substrate outside the sensing region; and

a field isolation implant region in the substrate outside the sensing region.

8. A method of manufacturing a CMOS image sensor, comprising the steps of:

providing a substrate, wherein the substrate is a first conductive type material layer and has a region for forming a desired sensor;

forming a well region in the substrate outside the desired sensor region;

forming an isolation region above the substrate, wherein the isolation region is formed between the well region and the desired sensor region;

forming a field effect transistor above the well region;

forming a sensor layer in the substrate within the desired sensing region, wherein the sensor layer is a second type conductive material layer; and

forming a dopant layer above the sensor layer, wherein the dopant layer is a first type conductive material layer.

9. The method of claim 8, wherein the first conductive type material includes a P-doped material and the second conductive type material includes an N-doped material.

10. The method of claim 8, wherein the first conductive type material includes an N-doped material and the second conductive type material includes a P-doped material.

11. The method of claim 8, wherein the step of forming the sensor layer includes implanting N-type ions having ion concentration of about 10¹⁶/cm³˜

to 2.0×

10¹⁷/cm³ to a depth of about 0.6˜

1.5 μ

m.

12. The method of claim 8, wherein the step of forming the dopant layer includes implanting P-type ions having ion concentration of about 10¹⁹/cm³˜

to 2.0×

10²⁰/cm³ to a depth of about 0.05˜

0.2 μ

m.

13. The method of claim 8, wherein after the step of forming the well region but before the step of forming the isolation region, further includes:

performing a field isolation implant to form a field implant region outside the desired sensing region.

14. The method of claim 8, wherein after the step of forming the isolation region but before the step of forming the field effect transistor, further includes:

performing an anti-punchthrough implant to form an anti-punchthrough implant region outside the desired sensing region.

15. A method of manufacturing a CMOS image sensor, comprising the steps of:

providing a substrate, wherein the substrate is a first conductive type material layer and has a region for forming a desired sensor;

forming a well region in the substrate outside the desired sensor region;

performing a field isolation implant to form a field isolation implant region outside the desired sensing region;

forming an isolation region above the substrate, wherein the isolation region is formed between the well region and the desired sensing region;

performing an anti-punchthrough implant to form an anti-punchthrough implant region outside the desired sensing region;

forming a field effect transistor above the well region;

forming a sensor layer in the substrate within the desired sensing region, wherein the sensor layer is a second type conductive material layer; and

forming a dopant layer above the sensor layer, wherein the dopant layer is a first type conductive material layer.

16. The method of claim 15, wherein the first conductive type material includes a P-doped material and the second conductive type material includes an N-doped material.

17. The method of claim 15, wherein the first conductive type material includes an N-doped material and the second conductive type material includes a P-doped material.

18. The method of claim 15, wherein the step of forming the sensor layer includes implanting N-type ions having ion concentration of about 10¹⁶cm³˜

to 2.0×

10¹⁷/cm³ to a depth of about 0.6˜

1.5 μ

m.

19. The method of claim 15, wherein the step of forming the dopant layer includes implanting P-type ions having ion concentration of about 10¹⁹/cm³˜

to 2.0×

10²⁰/cm³ to a depth of about 0.05˜

0.2 μ

m.