III-V compounds semiconductor device with an AIxByInzGa1-x-y-zN non continuous quantum dot layer
First Claim
1. A compound semiconductor device, comprising:
- a substrate;
a first high temperature n-type III-V compound layer having a first band gap grown directly on said substrate, wherein said high temperature n-type III-V compound layer is grown at a temperature greater than 900°
C. using HVPE techniques, wherein a low temperature buffer layer is not interposed between said substrate and said high temperature n-type III-V compound layer;
a second n-type III-V compound layer having a second band gap grown on said first high temperature n-type III-V compound layer using HVPE techniques, wherein said first band gap is wider than said second band gap;
a first p-type III-V compound layer having a third band gap grown on said second n-type III-V compound layer using HVPE techniques;
a second p-type III-V compound layer having a fourth band gap grown on said first p-type III-V compound layer using HVPE techniques, wherein said fourth band gap is wider than said third band gap; and
a non-continuous quantum dot layer comprised of a plurality of AlxByInzGa1-x-y-zN quantum dot regions, said non-continuous quantum dot layer formed between said second n-type III-V compound layer and said first p-type III-V compound layer, wherein 0.01≦
x+y≦
0.2.
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Accused Products
Abstract
A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
3 Citations
51 Claims
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1. A compound semiconductor device, comprising:
-
a substrate;
a first high temperature n-type III-V compound layer having a first band gap grown directly on said substrate, wherein said high temperature n-type III-V compound layer is grown at a temperature greater than 900°
C. using HVPE techniques, wherein a low temperature buffer layer is not interposed between said substrate and said high temperature n-type III-V compound layer;
a second n-type III-V compound layer having a second band gap grown on said first high temperature n-type III-V compound layer using HVPE techniques, wherein said first band gap is wider than said second band gap;
a first p-type III-V compound layer having a third band gap grown on said second n-type III-V compound layer using HVPE techniques;
a second p-type III-V compound layer having a fourth band gap grown on said first p-type III-V compound layer using HVPE techniques, wherein said fourth band gap is wider than said third band gap; and
a non-continuous quantum dot layer comprised of a plurality of AlxByInzGa1-x-y-zN quantum dot regions, said non-continuous quantum dot layer formed between said second n-type III-V compound layer and said first p-type III-V compound layer, wherein 0.01≦
x+y≦
0.2. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51)
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28. A compound semiconductor device, comprising:
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a p-type substrate;
a first high temperature p-type III-V compound layer having a first band gap grown directly on said substrate, wherein said high temperature p-type III-V compound layer is grown at a temperature greater than 800°
C. using HVPE techniques, wherein a low temperature buffer layer is not interposed between said substrate and said high temperature p-type III-V compound layer;
a second p-type III-V compound layer having a second band gap grown on said first high temperature p-type III-V compound layer using HVPE techniques, wherein said first band gap is wider than said second band gap;
a first n-type III-V compound layer having a third band gap grown on said second high temperature p-type III-V compound layer using HVPE techniques;
a second n-type III-V compound layer having a fourth band gap grown on said first n-type III-V compound layer using HVPE techniques, wherein said fourth band gap is wider than said third band gap; and
a non-continuous quantum dot layer comprised of a plurality of AlxByInzGa1-x-y-zN quantum dot regions, said non-continuous quantum dot layer formed between said second high temperature p-type III-V compound layer and said first n-type III-V compound layer, wherein 0.01≦
x+y≦
0.2.
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Specification